Method of forming micro pattern in semiconductor device

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S702000

Reexamination Certificate

active

11361520

ABSTRACT:
A method of forming a micro pattern in a semiconductor device, wherein a first polysilicon film, a buffer oxide film, a second polysilicon film, an anti-polishing film, and a first oxide film are sequentially laminated on a semiconductor substrate having a to-be-etched layer. The first oxide film, the anti-polishing film and the second polysilicon film are patterned. After nitride film spacers are formed on the patterned lateral portions, a second oxide film is formed on the entire structure. A Chemical Mechanical Polishing (CMP) process is performed using the anti-polishing film as a stopper. Thereafter, after the nitride film spacers are removed, the second oxide film and the second polysilicon film are removed using a difference in etch selective ratio between the oxide film and the polysilicon film. A hard mask for forming a micro pattern having a structure in which the first polysilicon film and the buffer oxide film are laminated is formed. The to-be-etched layer is etched using the hard mask as an etch barrier.

REFERENCES:
patent: 5013680 (1991-05-01), Lowrey et al.
patent: 6180973 (2001-01-01), Ozaki
patent: 6835662 (2004-12-01), Erhardt et al.
patent: 6955961 (2005-10-01), Chung
patent: 2005/0142497 (2005-06-01), Ryou et al.

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