Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-05-22
2000-02-08
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438276, 438278, H01L 218234
Patent
active
060227796
ABSTRACT:
A method of fabricating a mask ROM includes forming a trench on a first conductivity type semiconductor substrate, implanting a second conductivity type impurity ion in at least a surface portion of the semiconductor substrate where the trench is formed, forming an insulating oxide layer on a surface of the semiconductor substrate, including a surface of the trench, forming gate oxide layers of both sides of the trench, forming first and second gates on the gate oxide layers and forming a first conductivity type channel by implanting a first conductivity type impurity ion in one side of the trench. As such, the resulting mask ROM includes two transistors on either side of a trench having channels along the side walls of the trench. The resulting mask ROM has a reduced surface width, enhancing integration.
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Fujio Masuoka, et al, "An 80 ns 1 Mbit Mask ROM with a New Memory Cell," Journal of Solid-State Circuits, vol.sc.19.No. 5.Oct. 1984, pp. 651-657.
Lee Ki-Jik
Shin Bong-Jo
Bowers Charles
Chen Jack
LG Semicon Co. Ltd.
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