Method of forming layers of oxide on a surface of a substrate

Details Method of forming layers of oxide on a surface of a substrate Method of forming layers of oxide on a surface of a substrate

2002-07-30

2004-03-09

Nguyen, Van Thu (Department: 2824)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S410000, C257S411000, C438S275000, C438S585000, C438S591000, C438S745000, C438S756000, C438S757000

Reexamination Certificate

active

06703278

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of fabrication of integrated circuits, and, more particularly, to a method of forming oxide layers on the surface of a substrate during the fabrication of semiconductor devices.
2. Description of the Related Art
During the fabrication process of integrated circuits, several oxide layers of different thickness are formed on the surface of a substrate (for instance a silicon substrate) at various manufacturing stages for a variety of different purposes. For instance, relatively thick oxide layers are required for most electrical insulation purposes. However, in metal oxide silicon (MOS) devices, the gate oxide, which insulates the gate from the source, drain and the channel, is required to be as thin as possible to allow the electrical potential applied to the gate to effectively influence charge carriers in the substrate, thus forming the channel.
The ever increasing miniaturization, during the last years, of the devices manufacturable on a substrate, has required the realization of MOS devices (including CMOS devices, PMOS devices, NMOS devices, and the like) featuring gate oxide layers in the range of only a few nanometers. This is essentially due to the fact that, as the dimensions of the MOS devices decrease, the channel length approaches the dimensions of the width of the depletion regions of the source and drain junctions. As a result, a certain portion of the channel region is partially depleted without any influence of the gate voltage. To compensate for this effect, a gate oxide of reduced thickness is required.
This being the situation, many efforts have been made in the past for realizing very thin gate oxide layers featuring a low defect rate, i.e., a minimal number of dopants and minimal crystalline defects in the gate oxide layer.
However, along with the exigence of realizing gate oxides of ever decreasing thickness, there has been an increased demand to integrate circuits or devices on a single chip that are operated at different supply voltages. In fact, in order to obtain a very high level of integration, devices performing different functions must be integrated on the same chip. Accordingly, since for a given supply voltage at which a MOS device is operated, the drain current is inversely proportional to the thickness of the gate oxide, MOS devices featuring different gate oxide thicknesses may be formed to meet the very different requirements for a complex circuit. Moreover, the most modem integrated devices performing very complex operations require the realization of CMOS devices featuring a so-called dual gate oxide, namely CMOS devices wherein the gate oxides on the P-channel and the N-channel have a different thickness.
Typically, the thickness differences on such dual gate oxide devices must be generally maintained within the range of a few tenths of a nanometer. As a result, the formation of dual gate oxides has become a major challenge in the manufacturing of integrated devices. Accordingly, it would be highly desirable to provide a method of reliably forming dual gate oxides featuring extremely low thickness differences.
In the following, description will be given with reference to
FIGS. 1
a
-
1
d
and
2
a
-
2
e
of two commonly used prior art methods of forming dual gate oxides. In
FIGS. 1
a
-
1
d
, reference
1
relates to a substrate, for instance a silicon wafer, on which two oxide layers of different thickness must be Conned on portions
2
and
3
of the upper surface, respectively. According to the prior art method depicted in
FIGS. 1
a
-
1
d
, the portion of the surface of the substrate targeted for the thin thick layer of oxide (in the present case portion
2
) is first masked with a layer of resist
6
, and ions are implanted at high dose and energy on the portion of the surface of the substrate targeted for the thick layer of oxide (in the present case portion
3
), so as to create severe damage in that portion (see
FIG. 1
b
).
Subsequently, in a next step as depicted in
FIG. 1
c
, the resist layer
6
is removed. Finally, the substrate
1
is subjected to a conventional gate oxidation processing. Due to the damage produced by the ions implanted in the portion
3
, the diffusion of oxygen in the portion
3
is enhanced and, as a result, as depicted in
FIG. 1
d
, a thick layer of oxide will grow on portion
3
of the surface of the substrate
1
.
The prior art method described above has the advantage that a single masking step is sufficient. However, this method requires a high temperature oxidation process and is, therefore, not compliant with alternative approaches for ultra-thin gate-dielectric processing. In fact, it has to be noted that high temperature oxidation processes modify the density profile of ions implanted in the substrate and therefore influence the electrical behavior of the final device. Finally, the prior art method described above in
FIGS. 1
a
-
1
d
has the drawback that the thick oxide layer is prone to premature failures which result in a decreased reliability of the final device.
A further prior art method of forming a dual gate oxide will be described in the following with reference to
FIGS. 2
a
-
2
e
. As in the case of the prior art method disclosed previously, in
FIGS. 2
a
-
2
e
there is depicted a substrate
1
with portions
2
and
3
on its upper surface. In a first step, a thick layer of oxide
5
is formed on both portions
2
and
3
, as depicted in
FIG. 2
b
; to this end, a common process, for instance a thermal oxidization process, may be carried out.
Subsequently, as depicted in
FIG. 2
c
, the portion
2
of the surface of the substrate targeted for the thicker oxide layer is masked, for instance using a masking resist
6
. In a further step, as depicted in
FIG. 2
d
, the oxide layer
5
is removed from the portion
3
of the surface of the substrate
1
targeted for the thin oxide layer. To this end, the substrate
1
is subjected to either a wet-etching or a dry-etching process. The resist layer
6
is then removed and a second gate oxide is grown by conventional thermal processing on both surface portions
2
and
3
. As a result, a final oxide layer
3
′ on portion
3
is obtained, together with a final oxide layer
5
′ on portion
2
. The thickness of the final layer
5
′ does not significantly differ from the thickness of the initial layer
5
, and the final layers
3
′ and
5
′ feature the predefined, desired thickness difference.
The prior art method as described above has the disadvantage that the two oxide layers
5
′ and
3
′ have thicknesses differing more than 30 angstroms. This large thickness difference makes it difficult for the final device to exhibit the desired electrical performance characteristics.
In view of the above-explained problems, it would be desirable to have an improved method of forming dual gate oxides eliminating or at least partially limiting one or more of the drawbacks of the prior art.
SUMMARY OF THE INVENTION
Generally, the present invention is directed to various methods of forming oxide layers of different thicknesses, wherein the number of masking steps may be reduced and/or high temperature processes are substantially eliminated. For this purpose, according to a first embodiment, the present invention relates to a method of forming at least one first layer of nitrided oxide of a first, predefined thickness on at least one first portion of the surface of a substrate and at least one second layer of nitrided oxide of a second, predefined, different thickness on at least one second portion of the surface of the substrate. The method comprises forming at least one initial layer of nitrided oxide of an initial thickness exceeding both the first and second predefined thicknesses on at least one first and one second portion of the surface of the substrate. Moreover, the method includes thinning the initial layer of nitrided oxide on at least one first portion of the surface of the substrate to the respective, first

Affiliated with

Also associated with

Rating

Method of forming layers of oxide on a surface of a substrate does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming layers of oxide on a surface of a substrate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming layers of oxide on a surface of a substrate will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3281040