Method of forming ladder-type gate structure for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S149000, C438S151000, C438S157000

Reexamination Certificate

active

07101745

ABSTRACT:
A ladder-type gate structure for a silicon-on-insulator (SOI) four-terminal semiconductor device is disclosed. The structure includes a gate having a first and second portion, a body region, which is under the first portion of the gate, a body contact, which is adjacent to the second portion of the gate, and a plurality of body contacts connecting the body region to the body contact through a drain region. The gate structure provides an independently controlled body region and includes a substantially uniform voltage across the body region in the SOI semiconductor device.

REFERENCES:
patent: 5811855 (1998-09-01), Tyson et al.
patent: 5821575 (1998-10-01), Mistry et al.

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