Method of forming isolation regions for integrated circuits

Details Method of forming isolation regions for integrated circuits Method of forming isolation regions for integrated circuits

2008-09-09

2008-09-09

Smoot, Stephen W. (Department: 2813)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

Reexamination Certificate

active

10389456

ABSTRACT:
A method of manufacturing an integrated circuit (IC) utilizes a shallow trench isolation (STI) technique. The shallow trench isolation technique is used in strained silicon (SMOS) process. The liner for the trench is formed from a semiconductor or metal layer which is deposited in a low temperature process which reduces germanium outgassing. The low temperature process can be a CVD process.

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