Method of forming isolation film for semiconductor devices

Details Method of forming isolation film for semiconductor devices Method of forming isolation film for semiconductor devices

1999-10-05

2001-07-10

Utech, Benjamin L. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S723000, C438S724000

Reexamination Certificate

active

06258726

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method of forming an isolation film for semiconductor devices.
2. Description of the Related Art
A typical process for forming a trench-type isolation film in an integrated circuit includes using a mask layer pattern to protect an active region of a semiconductor substrate, forming a trench in a field region of the semiconductor substrate, filling the trench with a dielectric film, flattening the dielectric film, and removing the mask layer pattern. The shape of the isolation film and a step between the isolation film and the active region can affect the characteristics of a gate oxide film formed subsequently. For example, a gate oxide film is typically thinner at a side wall of the trench, that is at the transition between the isolation film and the active region. A voltage applied across the gate oxide film induces charge and electric fields that are greatest where the gate oxide film is thinnest. As a result, the insulating characteristics of the thinnest regions of the gate oxide film can be degraded.
Another factor that affects the characteristics of the gate oxide film is an annealing that increases the isolation film's resistance against a wet etching. For example, when the isolation film is annealed at 1050° C., the wet etching resistance of the isolation film increases. However, the annealing can generate defects such as dislocations in the isolation film. The dislocations can degrade the characteristics of the overlying gate oxide film. In contrast, annealing the isolation film at a higher temperature, for example, 1150° C., avoids defects such as dislocations in the isolation film but may partially thin the gate oxide film.
SUMMARY OF THE INVENTION
To solve the above problems, a method of forming an isolation film for semiconductor devices improves the characteristics of a gate oxide film to be formed later by removing defects in an isolation film and improving the shape of the isolation film filling a trench. In particular, a spacer in the isolation film at the edge of the trench smoothes the transition from the isolation film to the active region and allows formation of a uniform gate oxide film.
In accordance with one embodiment of the present invention, a method of forming an isolation film starts by setting an active region and a field region in a substrate. A mask layer pattern, including first and second mask layer patterns, covers the active region and exposes the field region to permit formation of a trench in the field region. A first insulating film, which fills the trench, is formed on the mask layer pattern and is densified. Etching back the first insulating film to expose the sidewalls of the second mask layer pattern forms a first isolation film. A first spacer is then formed on the sidewall of the mask layer pattern, and the first isolation film is anisotropically etched until the altitude or level of the first isolation film is lower than that of the active region of the substrate. The second mask layer pattern and the first spacer are removed. The first mask layer pattern is removed, leaving a second isolation film with a second spacer that makes an acute angle with the sidewall of the trench on the upper sidewall of the trench.
In an exemplary embodiment, the first and second mask layer patterns are respectively a pad oxide film pattern and a nitride film pattern, and the isolation film is an undoped silicate glass. Annealing at a predetermined temperature, e.g., 1150° C., can densify the isolation film. The first spacer is a nitride film, a high temperature oxide (HTO) film or a Plasma Enhanced-TetraEthoxyOrthoSilicate (PE-TEOS) film.
The etch-back of the first insulating film includes: etching the first insulating film until the surface of the mask layer pattern is exposed; and wet etching the first isolation film until the first isolation film is level with the first mask layer pattern.
The formation of the first spacer includes: forming a second insulating film on the first isolation film and the entire surface of the second mask layer pattern; and anisotropically etching the second insulating film until the first isolation film and the second mask layer pattern are exposed. The entire surface of the second insulating film can be anisotropically etched using plasma to leave the second spacer as a sidewall spacer on the second mask layer. According to one embodiment of the present invention, forming the second spacer and anisotropically etching the first isolation film are simultaneous.
In the isolation film formation, an isolation film having a portion contacting the upper end of a trench at an acute angle allows formation of a gate oxide film with a uniform thickness over the entire region. As a result, degradation of the characteristics of the gate oxide film, e.g., the breakdown voltage characteristics, can be prevented, and stresses in the isolation film can be dispelled.


REFERENCES:
patent: 5854121 (1998-12-01), Gardner et al.
patent: 5949126 (1999-09-01), Dawson et al.
patent: 6008109 (1999-12-01), Fulford, Jr. et al.

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