Method of forming highly resistive interconnects

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438382, 438384, H01L 2702, H01L 218242

Patent

active

061272175

ABSTRACT:
Provided is a high resistance value vertically-integrated semiconductor interconnect, and a process to make such highly resistive interconnects together with low resistive interconnects in a precisely controllable manner. In addition, provided is an SRAM cell with highly resistive contact processing for a pull-up resistor.

REFERENCES:
patent: 4394673 (1983-07-01), Thompson et al.
patent: 4675715 (1987-06-01), Lepselter et al.
patent: 4727045 (1988-02-01), Cheung et al.
patent: 5159430 (1992-10-01), Manning et al.
patent: 5168076 (1992-12-01), Godinho et al.
patent: 5232865 (1993-08-01), Manning et al.
patent: 5547881 (1996-08-01), Wang et al.
patent: 5760475 (1998-06-01), Cronin et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of forming highly resistive interconnects does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming highly resistive interconnects, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming highly resistive interconnects will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-194621

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.