Method of forming high integrity vias

Details Method of forming high integrity vias Method of forming high integrity vias

1997-12-18

2000-01-04

Utech, Benjamin

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438702, 438706, 438710, 438714, H01L 21465

Patent

active

060109653

ABSTRACT:
Aluminum extrusions in overlying vias are prevented by depositing the underlying aluminum layer at a high temperature, preferably at a temperature greater than any temperature to which the wafer is exposed during subsequent processing. Embodiments include sputter depositing the underlying aluminum layer at a temperature of about 430.degree. C. to about 570.degree. C.

REFERENCES:
patent: 4944682 (1990-07-01), Cronin et al.
patent: 5232872 (1993-08-01), Ohba
patent: 5484747 (1996-01-01), Chien
patent: 5726100 (1998-03-01), Givens
patent: 5783485 (1998-07-01), Ong et al.
patent: 5795825 (1998-08-01), Sugano et al.

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