Method of forming gate structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S739000, C257SE21170

Reexamination Certificate

active

07094638

ABSTRACT:
A method of forming a gate structure. First, a substrate is provided, and a gate oxide layer, a polysilicon layer, a silicide layer, and a cap layer are consecutively formed onto the substrate. Then, an etching process is performed to etch a portion of the cap layer, the silicide layer, and the polysilicon layer and stop on the polysilicon layer for forming a stacked gate. Thereafter, a portion of the silicide layer exposed on sidewalls of the stacked gate is removed to form a recess. A passivation layer is deposited to fill the recess. The remaining polysilicon layer and the gate oxide layer outside the sidewalls of the stacked gate structure are removed.

REFERENCES:
patent: 5545578 (1996-08-01), Park et al.
patent: 6258654 (2001-07-01), Gocho
patent: 6448140 (2002-09-01), Liaw
patent: 6503844 (2003-01-01), Curello
patent: 6521963 (2003-02-01), Ota et al.

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