Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-12-23
2004-10-12
Thompson, Craig A. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06803277
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to a method of fabricating a flash memory device and, more specifically, to a method of forming a gate electrode in a flash memory device.
2. Discussion of Related Art
In forming a gate electrode of a typical flash memory device, a doped polysilicon film of 4.7E20 atoms/cc or more is usually used so as to form a floating gate electrode having surface resistance (Rs) and an adequate concentration necessary for the operation of the gate electrode.
Meanwhile, the gate electrode formed using the doped polysilicon film having the above concentration is experienced by an oxidization process for compensating for the loss due to an etch process that is performed to form a gate electrode pattern, thereby forming a sidewall oxide film at the sidewall of the gate electrode pattern. In this case, the sidewall oxide film is formed thicker several times than a thickness of a desired oxide film. In other words, the doped polysilicon film of 4.7E20 atoms/cc or more reacts to a large amount of oxygen ions generated during the oxidization process for forming the sidewall oxide film to form an oxide film. For this reason, it results in an oxide film thicker several times than a thickness of a desired sidewall oxide film.
Therefore, due to such thick sidewall oxide film, in case of a tunnel oxide film formed at the bottom of the floating gate electrode, there is a problem that the edge of the tunnel oxide film is formed thicker than the center of the tunnel oxide film. There is also a problem that a smiling condition that an oxide film is formed at neighboring film quality happens in the oxide film of an ONO dielectric film formed at the top of the floating gate electrode.
Accordingly, there is a problem that it is impossible to secure the critical dimension (CD) of a gate electrode due to an unwanted region and an oxide film of an unwanted thickness.
SUMMARY OF THE INVENTION
The present invention is directed to a method of forming a gate electrode in a flash memory device that can secure the critical dimension (CD) of a gate electrode by uniformly controlling a thickness of a sidewall oxide film formed in a gate electrode sidewall.
According to a preferred embodiment of the present invention, there is provided a method of forming a gate electrode in a flash memory device, comprising the steps of sequentially forming a tunnel oxide film and an undoped first polysilicon film on a semiconductor substrate; forming a doped second polysilicon film having a doping concentration of about 1.0 to 1.7E20 atoms/cc on the undoped first polysilicon film; sequentially forming a dielectric film and a third polysilicon film on the doped second polysilicon film; patterning the resultant structure to form a floating gate electrode pattern, a dielectric film and a control gate electrode pattern; and performing an oxidization process for the resultant structure to form a sidewall oxide film in the floating gate electrode pattern and the sidewall of the control gate electrode pattern.
In the above, it is preferred that the first polysilicon film is formed in a thickness of about 250 to 500 Å at a temperature of about 480 to 550° C. and a pressure of 0.1 to 3 torr by means of a LP-CVD method using a Si source gas.
Further, it is preferable that the second polysilicon film is formed in a thickness of about 1200 to 2000 Å at a temperature of 480 to 550° C. and a pressure of 0.1 to 3 torr by means of a LP-CVD method using a Si source gas and a P source gas.
The oxidization process preferably includes forming a sidewall oxide film of 30 to 50 Å in a thickness at a temperature of about 750 to 950° C. by means of a dry oxidization mode in which an oxidization rate can be controlled readily.
It is preferred that the method further comprising the steps of patterning the first polysilicon film, the tunnel oxide film and the semiconductor substrate by a given depth, to form a trench so that an isolation region is defined for the resultant structure in which the first polysilicon film is formed, and burying the trench with an oxide film to form an isolation film.
REFERENCES:
patent: 2002/0068398 (2002-06-01), Dong et al.
Dong Cha Deok
Han II Keoun
Hynix / Semiconductor Inc.
Thompson Craig A.
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