Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-09-18
2007-09-18
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S238000, C438S381000, C257SE21170, C257SE21218, C257SE21245, C257SE21645
Reexamination Certificate
active
11250800
ABSTRACT:
A method of forming a NAND Flash memory device includes forming a control gate polysilicon layer over a substrate, forming a mask layer over the control gate polysilicon layer, the mask layer including a mask pattern defining a plurality of spaced word lines of the FLASH memory device, the word lines being spaced from each other a distance less than a minimum feature size which can be imaged by a selected photolithography process used in forming at least a portion of the mask layer pattern, and etching the control gate polysilicon layer through the mask layer.
REFERENCES:
patent: 4939690 (1990-07-01), Momodomi et al.
patent: 5050125 (1991-09-01), Momodomi et al.
patent: 5482881 (1996-01-01), Chen et al.
patent: 5631179 (1997-05-01), Sung et al.
patent: 5891774 (1999-04-01), Ueda et al.
patent: 5990509 (1999-11-01), Burns et al.
patent: 6580120 (2003-06-01), Haspeslagh
patent: 6714457 (2004-03-01), Hsu et al.
patent: 6765261 (2004-07-01), Widdershoven
patent: 6774433 (2004-08-01), Lee et al.
patent: 6806143 (2004-10-01), Chen
patent: 2001/0024854 (2001-09-01), Takeuchi et al.
patent: 2006/0022276 (2006-02-01), Park et al.
Park, Jong-Ho et al., 8Gb MLC (Multi-Level Cell) NAND Flash Memory using 63nm Process Technology, 0-7803-8684-1/04, © 2004 IEEE, pp. 36.1.1-36.1.4.
Lee, June et al., High-Performance 1-Gb NAND Flash Memory With 0.12-um Technology 0018-920/02 © 2002 IEEE, pp. 1502-1509.
Kamins, Theodore I., “Effect of Polysilicon-Emitter Shape on Dopant Diffusion in Polysilicon-Emitter Transistors,” 0741-3106/89/900/0401 © 1989 IEEE, 4 pages.
Duane Morris LLP
Elite Semiconductor Memory Technology Inc.
Nhu David
LandOfFree
Method of forming FLASH cell array having reduced word line... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming FLASH cell array having reduced word line..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming FLASH cell array having reduced word line... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3720910