Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
2011-03-08
2011-03-08
Lebentritt, Michael S (Department: 2829)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S303000, C438S745000, C257SE21626, C257SE21640
Reexamination Certificate
active
07902082
ABSTRACT:
Methods of forming integrated circuit devices include forming a field effect transistor having a gate electrode, sacrificial nitride spacers on opposing sidewalls of the gate electrode and source/drain regions, which are self-aligned to the sacrificial nitride spacers, on a semiconductor substrate. The sacrificial nitride spacers are selectively removed using a diluted hydrofluoric acid solution having a nitride-to-oxide etching selectivity in excess of one. In order to increase charge carrier mobility within a channel of the field effect transistor, a stress-inducing electrically insulating layer is formed on opposing sidewalls of the gate electrode. This insulating layer is configured to induce a net tensile stress (NMOS) or compressive stress (PMOS) in the channel.
REFERENCES:
patent: 5731617 (1998-03-01), Suda
patent: 6184157 (2001-02-01), Hsu et al.
patent: 6372589 (2002-04-01), Yu
patent: 6869866 (2005-03-01), Chidambarrao et al.
patent: 7022561 (2006-04-01), Huang et al.
patent: 7052946 (2006-05-01), Chen et al.
patent: 7189624 (2007-03-01), Ito
patent: 7297584 (2007-11-01), Park et al.
patent: 7396718 (2008-07-01), Frohberg et al.
patent: 7482215 (2009-01-01), Dyer et al.
patent: 7534678 (2009-05-01), Lee et al.
patent: 2003/0040158 (2003-02-01), Saitoh
patent: 2004/0021160 (2004-02-01), Eguchi et al.
patent: 2005/0048732 (2005-03-01), Park et al.
patent: 2005/0093078 (2005-05-01), Chan et al.
patent: 2005/0098829 (2005-05-01), Doris et al.
patent: 2005/0199963 (2005-09-01), Aoyama
patent: 2005/0211375 (2005-09-01), Knotter et al.
patent: 2005/0218455 (2005-10-01), Maeda et al.
patent: 2005/0230756 (2005-10-01), Chang et al.
patent: 2006/0011586 (2006-01-01), Shea
patent: 2006/0019438 (2006-01-01), Harakawa
patent: 2006/0046400 (2006-03-01), Burbach et al.
patent: 2006/0094193 (2006-05-01), Horstmann et al.
patent: 2006/0118879 (2006-06-01), Li
patent: 2006/0205169 (2006-09-01), Yoon et al.
patent: 2007/0099360 (2007-05-01), Lee et al.
patent: 2007/0252230 (2007-11-01), Zhu et al.
patent: 2007/0257336 (2007-11-01), Matsumoto
patent: 2008/0026523 (2008-01-01), Lee et al.
patent: 2008/0050869 (2008-02-01), Sudo
patent: 2008/0073713 (2008-03-01), Kim et al.
patent: 2008/0261385 (2008-10-01), Jawarani et al.
patent: 2009/0101945 (2009-04-01), Yamaguchi et al.
patent: 6-163578 (1994-06-01), None
patent: 10-177938 (1998-06-01), None
patent: 2001-352055 (2001-12-01), None
patent: 2003-60076 (2003-02-01), None
patent: 2003-86704 (2003-03-01), None
patent: 2003-273240 (2003-09-01), None
patent: 2004-47608 (2004-02-01), None
patent: 2004-128316 (2004-04-01), None
patent: 2005-64314 (2005-03-01), None
patent: 2006-80161 (2006-03-01), None
patent: 2006-173432 (2006-06-01), None
patent: 2006-237070 (2006-09-01), None
patent: 10-1997-0018691 (1997-04-01), None
patent: 10-0183785 (1998-12-01), None
patent: 1020010038794 (2001-05-01), None
patent: 10-2001-0076522 (2001-08-01), None
patent: 10-2002-0017845 (2002-03-01), None
patent: 10-2002-0074551 (2002-10-01), None
patent: 10-2003-0076354 (2003-09-01), None
patent: 10-2004-0070794 (2004-08-01), None
patent: 10-2004-0107477 (2004-12-01), None
patent: 10-2005-0049243 (2005-05-01), None
patent: 1020050048126 (2005-05-01), None
patent: 10-2006-0000912 (2006-01-01), None
patent: 10-2006-0004595 (2006-01-01), None
patent: 10-2006-0119773 (2006-11-01), None
U.S. Appl. No. 11/874,118, filed Oct. 17, 2007, Kim et al.
U.S. Appl. No. 11/831,223, filed Jul. 31, 2007, Nam et al.
Korean Office Action (3 pages) corresponding to Korean Application No. 10-2006-0128876; Dated: Oct. 24, 2007.
Henry Richard O.
Kwon O Sung
Kwon Oh Jung
Park Sang Jine
Tan Yong Siang
Lebentritt Michael S
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
Whalen Daniel
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