Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-03-18
2008-03-18
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S506000, C438S933000, C257SE21092, C257SE21115, C257SE21134, C257SE21319, C257SE21320, C257SE21632
Reexamination Certificate
active
11324510
ABSTRACT:
A method is disclosed of forming an extension region for a transistor having a gate structure overlying a compound semiconductor layer. An anneal is used either before or after deep source/drain implantation to diffuse a dopant from a raised region adjacent the gate structure to a location underlying the gate structure. A non-diffusing activation process can be used to activate source/drain implants when the dopants from the raised region are diffused prior to deep source/drain implantation.
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Nakahara et al., “Ultra-Shallow In-Situ-Doped Raised Source/Drain Structure for Sub-Tenth Micron CMOS,” 1996 Symposium on VLSI Technology Digest of Technical Papers, 1996 IEEE, pp. 174-175, NEC Corporation, Kanagawa Japan.
Foisy Mark C.
Goktepeli Sinan
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