Method of forming contact structures using nitrogen...

Details Method of forming contact structures using nitrogen... Method of forming contact structures using nitrogen...

2000-10-26

2003-06-03

Everhart, Caridad (Department: 2825)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S680000, C438S963000, C438S714000

Reexamination Certificate

active

06573181

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to the manufacture of integrated circuits. More specifically, embodiments of the present invention relate to a method of forming contact structures in such integrated circuits by precleaning the contact area with a nitrogen trifluoride dry cleaning process and subsequently depositing a titanium layer over the contact area using a chemical vapor deposition process. The present invention is applicable to a variety of titanium deposition processes and is particularly applicable to processes that include titanium tetrachloride (TiCl
4
) as a source of titanium.
One of the primary steps in fabricating modern semiconductor devices is forming various layers, including dielectric layers and metal layers, on a semiconductor substrate. As is well known, these layers can be deposited by chemical vapor deposition (CVD) or physical vapor deposition (PVD) among other methods. In a conventional thermal CVD process, reactive gases are supplied to the substrate surface where heat-induced chemical reactions take place to produce a desired film. In a conventional plasma CVD process, a controlled plasma is formed to decompose and/or energize reactive species to produce the desired film. In general, reaction rates in thermal and plasma processes may be controlled by controlling one or more of the following: temperature, pressure, plasma density, reactant gas flow rate, power frequency, power levels, chamber physical geometry, and others.
In an exemplary PVD system, a target (a plate of the material that is to be deposited) is connected to a negative voltage supply (direct current (DC) or radio frequency (RF) while a substrate holder facing the target is either grounded, floating, biased, heated, cooled, or some combination thereof. A gas, such as argon, is introduced into the PVD system, typically maintained at a pressure between a few millitorr (mTorr) and about 100 mTorr, to provide a medium in which a glow discharge can be initiated and maintained. When the glow discharge is started, positive ions strike the target, and target atoms are removed by momentum transfer. These target atoms subsequently condense into a thin film on the substrate, which is positioned on a substrate holder.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Today's wafer fabrication plants are routinely producing 0.35 &mgr;m and even 0.18 &mgr;m feature size devices, and tomorrow's plants soon will be producing devices having even smaller feature sizes. As device feature sizes become smaller and integration density increases, increasingly stringent requirements for fabricating such semiconductor devices often need to be met and conventional substrate processing systems and/or technique may be inadequate to meet these requirements.
The use of titanium is increasingly being incorporated into integrated circuit fabrication processes. One of the primary uses for titanium films in the manufacture of integrated circuits is as an initial adhesion layer in a titanium/titanium nitride stack that is part of a contact structure. Such a contact structure is shown in
FIG. 1A
, which is a cross-sectional view of an exemplary contact structure in which embodiments of the present invention may be employed. As seen in
FIG. 1A
, an oxide layer
2
(e.g., a BPSG film) is deposited over a substrate
4
having a surface of crystalline silicon. In order to provide electrical contact between a metal layer that will be subsequently formed above oxide layer
2
and the silicon substrate, a contact hole
6
is etched through oxide layer
2
and filled with a metal such as aluminum.
In many advanced integrated circuits, contact hole
6
is narrow, e.g., approximately 0.2 &mgr;m wide at the top, and has an aspect ratio of about 6:1 or greater. Filling such a hole is difficult, but a somewhat standard process has been developed in which hole
6
is first coated with a titanium layer
8
. Titanium (Ti) layer
8
is then conformally coated with a titanium nitride (TiN) layer
10
. Thereafter, an aluminum layer
12
is deposited, often by physical vapor deposition, to fill the contact hole
12
and to provide electrical interconnection lines on the upper level. Titanium layer
8
provides a glue layer to both the underlying silicon and the oxide on the sidewalls. Also, it can be silicided with the underlying silicon to form an ohmic contact. The TiN layer
10
bonds well to the Ti layer
8
, and the aluminum layer
12
wets well to the TiN so that the aluminum can better fill contact hole
6
without forming an included void. Also, TiN layer
10
acts as a diffusion barrier that prevents aluminum
12
from migrating into silicon
4
and affecting its conductivity.
To properly fulfill its purpose, titanium layer
8
must have excellent bottom coverage, low resistivity, uniform resistivity and uniform deposition thickness both across the entire bottom of the contact and across the entire wafer (center to edge) among other characteristics. Also, it is preferred that titanium layer
8
deposit uniformly along the bottom of contact
6
, but not deposit at all along the sidewalls. Preventing titanium deposition on the sidewalls prevents the phenomenon known as “silicon creep” where silicon from the contact area reacts with titanium in the sidewall and is transported from the contact bottom up into the sidewall.
In order to meet these requirements, many semiconductor manufacturers have turned to CVD titanium deposition techniques as opposed to titanium sputter deposition (PVD) techniques. Sputtering may damage previously deposited layers and structures in such devices creating performance and/or yield problems. Also, titanium sputtering systems may be unable to deposit uniform conformal layers in high aspect ratio gaps because of shadowing effects that occur with sputtering.
In contrast to sputtering systems, a plasma chemical vapor deposition system may be more suitable for forming a titanium film on substrates with high aspect ratio gaps. As is well known, a plasma, which is a mixture of ions and gas molecules, may be formed by applying energy, such as radio frequency (RF) energy, to a process gas in the deposition chamber under the appropriate conditions, for example, chamber pressure, temperature, RF power, and others. The plasma reaches a threshold density to form a self-sustaining condition, known as forming a glow discharge (often referred to as “striking” or “igniting” the plasma). This RF energy raises the energy state of molecules in the process gas and forms ionic species from the molecules. Both the energized molecules and ionic species are typically more reactive than the process gas, and hence more likely to form the desired film. Advantageously, the plasma also enhances the mobility of reactive species across the surface of the substrate as the titanium film forms, and results in films exhibiting good gap filling capability.
One known plasma CVD method of depositing titanium films includes forming a plasma from a process gas that includes a TiCl
4
source gas and a hydrogen (H
2
) reactant gas. Such a plasma CVD TiCl
4
/H
2
process may result in the deposition of a titanium film that has good via-fill, uniformity and contact resistance properties making the film appropriate for use in the fabrication of many different commercially available integrated circuits.
In order to achieve a contact resistance sufficiently low to meet some semiconductor manufacturers requirements for some small-width contact processes (e.g., contact holes having a diameter of less than or equal to 0.25 &mgr;m at bottom of the hole), however, deposition of the CVD titanium layer using a TiCl
4
source gas has been performed at a relatively high deposition temperature of about 680° C. As device sizes have continued to decrease, it has become important for semiconductor manufacturers to limit the overall thermal budget of the integrated circuit formation process. Thus, it is desirable to develop techniques that enable the

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