Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2005-06-07
2005-06-07
Goudreau, George A. (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S275000, C438S279000, C438S734000, C438S740000, C438S750000
Reexamination Certificate
active
06903022
ABSTRACT:
A method of forming contact holes. A dielectric liner is comformally formed on a substrate, parts of the dielectric liner between the second and the third conducting structure are removed, a conductive liner is conformally formed on the substrate, and parts of the metal layer are removed to leave parts thereof between the second and the third conducting structure. An ILD layer is then formed on the entire surface of the substrate, and a patterned photoresist layer is formed on the ILD layer. Finally, the ILD layer is etched using the patterned photoresist layer as a mask to form a first contact hole, a second contact hole, and a third contact hole in the ILD layer at the same time.
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patent: 6410422 (2002-06-01), Sun et al.
patent: 6486033 (2002-11-01), Tu et al.
patent: 6548394 (2003-04-01), Peng et al.
patent: 2004/0147107 (2004-07-01), Gustin et al.
Peng Hsin-Tang
Wang Yung-Ching
Yang Teng-Chun
Birch & Stewart Kolasch & Birch, LLP
Goudreau George A.
ProMOS Technologies Inc.
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