Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-03-11
2002-11-19
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S401000
Reexamination Certificate
active
06482702
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an identification mark. In particular, the present invention relates to a method of forming and recognizing an identification mark for read-only memory (ROM), the application of which reduces the number of masks needed in the manufacturing process, thereby reducing manufacturing cost.
2. Description of the Related Art
Conventionally, in the manufacturing process of mask read-only memory (hereinafter referred to as a MASK ROM) cells, there is an identification mark formed on each chip having MASK ROM cells to easily distinguish each client's product or products with different program codes. However, in the conventional method of manufacturing MASK ROM cells, it is necessary to prepare extra mark masks having different identification mark patterns for each chip in addition to code masks to code the MASK ROM cells by ion implantation. Accordingly, the conventional method needs a large number of masks for identification marks. As a result, manufacturing cost is significantly increased.
FIG. 1
is a top-view diagram showing a part of a chip having MASK ROM cells and an identification mark according to the prior art. In
FIG. 1
, number
10
represents a semiconductor substrate such as a silicon chip. Number
10
a
represents a device region on which MASK ROM cells is deposed. Number
12
represents an insulating region having an insulator such as field oxide (FOX) or shallow trench isolation (STI) oxide. Number
12
a
represents an identification mark such as “V1”. Numbers
14
and
16
represent a word line and a bit line of the MASK ROM respectively.
FIGS. 2
a
to
2
e
are section diagrams along the A—A line in
FIG. 1
showing a conventional method of forming an identification mark for MASK ROM. In
FIG. 2
a
, a semiconductor substrate
10
having an insulating region
12
and a device region
10
a
thereon is provided, and a word line
14
of the MASK ROM (not shown) is formed on the device region
10
a.
In
FIG. 2
b
, after a code mask (not shown) is used for photolithography, a patterned resist layer
18
is formed on the insulating region
12
and the device region
10
a
to expose the word line
14
and a part of the device region
10
a
. Thereafter, ion implantation is performed to code the MASK ROM. The implanting depth of the device region
10
a
underlying the word line
14
is shallower than that of the exposed device region
10
a
near the word line
14
. Mark “+” represents the doped element.
In
FIG. 2
c
, after the patterned resist layer
10
is stripped, another patterned resist layer
20
is formed on the insulating region
12
and the device region
10
a
using a mark mask (not shown) to expose the insulating region
12
. The top view pattern above the exposed insulating region
12
is “V1”.
In
FIG. 2
d
, the exposed insulating region
12
is etched using the resist layer
20
as a mask to transfer the pattern “V1” to the insulating region
12
and an identification mark
12
a
is then formed. In
FIG. 2
e
, the patterned resist layer
20
is stripped to complete the identification mark
12
a
fabrication.
As mentioned above, since mark masks are manufactured with different clients or different program codes, it is necessary to prepare a large number of mark masks for MASK ROM.
Seeking to solve this problem, a process for coding and code marking a read-only memory device is disclosed in U.S. Pat. No. 5,576,236. A mark is formed on a buffer layer using a code mask having identification mark pattern. This method only needs once photolithography and reduces the number of masks thereby reducing the cost. However, this method increases the number of process steps by forming an extra buffer layer. In addition, the mark is formed on the buffer layer, which is thin. Thus, the identification mark disappears or is difficult to recognize easily after the follow deposition steps.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of forming an identification mark for read-only memory in which a common mask is used to reduce the number of masks used in the manufacturing process thereby reducing the manufacturing cost.
Therefore, the present invention provides a method of forming an identification mark for MASK ROM. The method uses code masks having identification mark patterns and a common mask to replace code masks and mark masks. Thus, the number of the masks for MASK ROM is reduced. Moreover, the identification mark is formed in the thicker field oxide or STI oxide to prevent disappearance of the mark. The mark can be recognized easily using an optical microscope (OM).
In accordance with the object of this invention, a method of forming an identification mark for read-only memory includes the steps of: providing a semiconductor substrate having an insulating region and a device region thereon; forming a first patterned resist layer on the insulating region and the device region by a first mask having an identification mark pattern over the insulating region; performing ion implantation to code in the device region; forming a second patterned resist layer on the first patterned resist layer by a second mask to expose the entire identification mark pattern of the first patterned resist layer only; etching the insulating region to transfer the identification mark pattern to the insulating region; and removing the first and the second patterned resist layers. Moreover, the insulating region is composed of field oxide or shallow trench isolation oxide and the device region is composed of at least one mask read-only memory. The first mask is a code mask further including a code pattern over the device region. The second mask is a common mask having an opening pattern to expose the identification mark pattern of the first resist layer only. The ion implantation can be performed using boron.
It is another object of the present invention is to provide a method of recognizing a chip having read-only memory cells in which a clear identification mark is formed on the insulating region, making recognition of the mark easy using optical equipment.
Accordingly, a method of recognizing a chip having read-only memory cells includes steps of: providing a semiconductor substrate having an insulating region and a device region thereon; forming a first patterned resist layer on the insulating region and the device region by a first mask having an identification mark pattern and a code pattern over the insulating region and the device region respectively; forming a second patterned resist layer on the first patterned resist layer by a second mask to expose the entire identification mark pattern of the first patterned resist layer only; etching the insulating region to transfer the identification mark pattern to the insulating region; removing the first and the second patterned resist layers to obtain an identification mark; and identifying the identification mark formed on the insulating region by optical equipment. Moreover, the method further includes the step of performing ion implantation to code in the device region after the first patterned resist layer is formed. The optical equipment can be an optical microscope.
REFERENCES:
patent: 5051374 (1991-09-01), Kagawa et al.
patent: 5576236 (1996-11-01), Chang et al.
patent: 5668030 (1997-09-01), Chung et al.
patent: 5693551 (1997-12-01), Su et al.
patent: 6103561 (2000-08-01), Seshadri et al.
Yang Hsiao-Ying
Yu Chi-Hua
Chaudhari Chandra
Intellectual Property Solutions Incorporated
Vanguard International Semiconductor Corporation
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