Method of forming an isolation trench in a semiconductor device

Details Method of forming an isolation trench in a semiconductor device Method of forming an isolation trench in a semiconductor device

1998-12-01

2000-10-31

Beck, Shrive

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438692, 438697, 438719, 438738, 438756, 438723, 438724, H01L 21302

Patent

active

061402427

ABSTRACT:
A method of forming an isolation trench in a semiconductor device results in increasing trench isolation characteristics by optimizing an annealing temperature thereby removing substrate defects caused during the etching of a semiconductor substrate and relieving stress thereby improving yield and reliability of devices. Appropriate adjustment of the rates of temperature change allow higher annealing temperatures to be employed without encountering attendant stresses due to differences in thermal expansion coefficients between the substrate and the trench material.

REFERENCES:
patent: 5395790 (1995-03-01), Lur
patent: 5643823 (1997-07-01), Ho et al.
patent: 5786262 (1998-07-01), Jang et al.
patent: 5926722 (1999-07-01), Jang et al.

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