Method of forming an interlayer dielectric

Details Method of forming an interlayer dielectric Method of forming an interlayer dielectric

2005-06-09

2008-10-28

Nguyen, Thanh (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S197000, C438S587000, C438S757000, C438S791000

Reexamination Certificate

active

07442598

ABSTRACT:
A method for forming a semiconductor device comprises providing a semiconductor substrate; forming a first stressor layer over a surface of the semiconductor substrate; selectively removing portions of the first stressor layer; forming a second stressor layer over the surface of the semiconductor substrate and the first stressor layer; and selectively removing portions of the second stressor layer using an isotropic etch. In one embodiment, the isotropic etch is a wet etch that selectively removes the second stressor layer without removing a significant amount of the first stressor layer and also planarizing a boundary between the first stressor layer and the second stressor layer.

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Yang et al, “Dual Stress Liner for High Performance sub-45nm Gate Length SOI CMOS Manufacturing”, IEDM 2004.

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