Method of forming an integrated circuit

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S183000, C257SE21672

Reexamination Certificate

active

07824988

ABSTRACT:
A method includes forming a source, a drain, and a disposable gate (38) of the first transistor; forming a source, a drain, and a disposable gate of the second transistor; removing the disposable gates of the first transistor and the second transistor; forming a photoresist layer over the first transistor and the second transistor; patterning the photoresist layer to expose a gate region of the first transistor and a gate region of the second transistor; and implanting the substrate under the gate region of the first transistor and under the gate region of the second transistor, wherein implanting the substrate under the gate region of the first transistor provides a permanent shorting region between the source and the drain of the first transistor, and wherein implanting the substrate under the gate region of the second transistor adjusts a threshold voltage of the second transistor.

REFERENCES:
patent: 6146949 (2000-11-01), Wu
patent: 6864142 (2005-03-01), Conn
patent: 7227232 (2007-06-01), Liou et al.
patent: 7518179 (2009-04-01), Swift et al.
patent: 2004/0077138 (2004-04-01), Houston et al.
patent: 2008/0067600 (2008-03-01), Hsu et al.
patent: 2008/0067608 (2008-03-01), Hsu et al.
patent: 2007079295 (2006-11-01), None
Mistry, K., et al., “A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193 nm Dry Patterning, and 100% Pb-free Packaging”, IEDM 2007, pp. 247-250 (Intel).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of forming an integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming an integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming an integrated circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4244864

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.