Method of forming a wiring structure in a semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S638000, C438S672000, C438S673000, C438S508000

Reexamination Certificate

active

07829458

ABSTRACT:
A wiring structure includes a first insulation layer located on a substrate, and first and second plugs located on the substrate and extending through the first insulation layer. The first plug includes an upper peripheral portion that defines a recess and the second plug is adjacent to the first plug. A second insulation layer is located on the first insulation layer, the first plug and the second plug. A bit line structure is located on the second insulation layer and is electrically connected to the first plug. A protection spacer is located on the recess of the first plug and a sidewall of an opening in the second insulation layer. The opening exposes the recess of the first plug, the second plug and the sidewall of the bit line structure. A pad is located in the opening and contacts the second plug.

REFERENCES:
patent: 6936510 (2005-08-01), Itabashi et al.
patent: 1020010087663 (2001-09-01), None
patent: 1020040105949 (2004-12-01), None
patent: 1020060029006 (2006-04-01), None

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