Method of forming a trench with a rounded bottom in a...

Details Method of forming a trench with a rounded bottom in a... Method of forming a trench with a rounded bottom in a...

2001-02-23

2003-02-18

Chaudhuri, Olik (Department: 2814)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S696000, C438S700000

Reexamination Certificate

active

06521538

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method for manufacturing a semiconductor device having a trench formed on a semiconductor substrate, and to an insulated gate type power transistor.
2. Description of the Related Art
Recently, insulated gate type power transistors such as a MOS type power transistor and an IGBT type power transistor have adopted a trench-gate structure in which a gate is formed on a side wall of a trench so as to realize size reduction and low resistance of the device. In the trench-gate structure, the trench (deep groove) is formed on a silicon substrate by dry etching (anisotropic etching), and the gate is formed on this trench.
In an element adopting the trench-gate structure, however, electric field is liable to concentrate on an angular corner of the bottom portion of the trench, and the electric field concentration lowers a gate breakdown voltage in comparison with a device adopting a planar type structure. To solve this problem, in the conventional structure, isotropic etching is performed to the trench to round the corner of the bottom portion of the trench.
A process for rounding the corner of the bottom portion of the trench is explained as an example with reference to
FIGS. 9A
to
9
D. In this process, first, as shown in
FIG. 9A
, a trench mask
102
is formed, with an opening
102
a
for trench formation, on a silicon substrate
101
. Then, as shown in
FIG. 9B
, a trench
103
is formed on the silicon substrate
101
by anisotropic etching. The anisotropic etching produces a reaction product
104
, and forms a layer of the reaction product
104
on the inner surface of the trench
103
. Next, as shown in
FIG. 9C
, the reaction product
104
is removed from the inner surface of the trench
103
. Successively, as shown in
FIG. 9D
, isotropic etching is performed to round the corner
103
a
of the bottom portion of the trench
103
.
In the process, however, if isotropic etching is sufficiently performed to round the corner
103
a
of the trench
103
, silicon is excessively etched, which adversely affects the trench formation and device design. For example, as shown in
FIG. 9D
, the opening
103
b
of the trench
103
may be undesirably widened. This makes it difficult to fine each width and an interval of trenches.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above problems. An object of the present invention is to provide a method for manufacturing a semiconductor device with a trench that has a sufficiently rounded corner at a bottom portion thereof. Another object of the present invention is to provide a method for manufacturing a semiconductor device capable of preventing excessive etching of silicon to form a trench, and of fining the trench. Still another object of the invention is to provide an insulated gate type power transistor having a fine trench.
According to one aspect of the invention, when a trench is formed on a semiconductor substrate, first, anisotropic etching is performed to form the trench, which is accompanied by deposition of a reaction product on an inner wall of the trench. Then, isotropic etching is performed to round a corner of a bottom portion of the trench using the reaction product as a mask.
In this case, because the reaction product is produced during the anisotropic etching with a thickness that is thin on the bottom portion and is thick on a side wall of the trench, it can be used as the mask for rounding the corner sufficiently by the isotropic etching. The side wall of the trench, covered by the reaction product, is hardly etched by the isotropic etching, thereby preventing excessive etching of silicon. A fine structure of the trench can be realized accordingly.
Preferably, the isotropic etching is performed under an etching condition, which suppresses etching by ions in a thickness direction perpendicular to a surface of the semiconductor substrate and enhances etching by radicals in a lateral direction parallel to the surface of the semiconductor substrate.


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