Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-12-31
1999-06-01
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438300, 438302, 438430, H01L 21336
Patent
active
059083131
ABSTRACT:
A novel MOS transistor having minimal junction capacitance in this method of fabrication. According to the present invention, a gate dielectric layer is formed on a first surface of the semiconductor substrate. A gate electrode is then formed on the gate dielectric layer. Next, a pair of recesses are formed in the semiconductor substrate on opposite sides of the gate electrode. A dielectric layer is then formed on the surface of each of the recesses. A Semiconductor material is then deposited into the recesses to form a pair of source/drain regions.
REFERENCES:
patent: 4523213 (1985-06-01), Konaka et al.
patent: 4683637 (1987-08-01), Varker et al.
patent: 4700454 (1987-10-01), Baerg et al.
patent: 4963502 (1990-10-01), Teng et al.
patent: 5218221 (1993-06-01), Okumura
patent: 5620912 (1997-04-01), Hwang et al.
patent: 5674760 (1997-10-01), Hong
patent: 5710450 (1998-01-01), Chau et al.
patent: 5712173 (1998-01-01), Liu et al.
N. Hatzopoulos, et al.; "Buried Insulator Formation by Nitrogen Implantation at Elevated Temperatures"; 1991; Elsevier Science Publishers BV. (North-Holland) pp. 734-737.
Lin Chenglu, et al; "SOI Structure Formed by 95 keV N.sup.+.sub.2 and N.sup.+ Implantation and Epitaxial Growth"; 1991; Elsevier Science Publishers BV. (North-Holland) pp. 742-745.
P.L.F. Hemment, et al.; "High Quality Silicon on Insulator Structures Formed by the Thermal Redistribution of Implanted Nitrogen"; May 1985 Applied Physics Letter 46 (10); pp. 952-954.
Chau Robert S.
Jan Chia-Hong
Packan Paul
Taylor Mitchell C.
Intel Corporation
Nguyen Tuan H.
LandOfFree
Method of forming a transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-951305