Method of forming a stack-gate of a non-volatile memory on a sem

Details Method of forming a stack-gate of a non-volatile memory on a sem Method of forming a stack-gate of a non-volatile memory on a sem

1999-07-14

2000-12-12

Booth, Richard

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438974, 438258, H01L 218247

Patent

active

06159802&

ABSTRACT:
The invention relates to a method of forming a stack-gate of a non-volatile memory. In this method, the stack-gate is formed in a predetermined region of the substrate of a semiconductor wafer. Then, a gate oxide layer, a first gate conductive layer, a dielectric layer, and a passivation layer are formed followed by lithography and stripping of the photo-resist layer and removal of the passivation layer from the dielectric layer. Finally, a second gate conductive layer is formed on the dielectric layer as the control gate of the stack-gate. The passivation layer can prevent the dielectric layer from being damaged during stripping of the photo-resist layer.

REFERENCES:
patent: 5861347 (1999-01-01), Maiti et al.
patent: 5888869 (1999-03-01), Cho et al.
patent: 5923975 (1999-07-01), Rolandi

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