Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2008-11-25
2010-11-02
Garber, Charles D (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C257SE21249
Reexamination Certificate
active
07825030
ABSTRACT:
A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover the structure, and a sacrificial layer is formed on the spacer formation layer. The sacrificial layer is wet etched to form a sacrificial layer pattern on that portion of the spacer formation layer extending along a sidewall of the structure. The spacer is formed on the sidewall of the structure by wet etching the spacer formation layer using the sacrificial layer pattern as a mask.
REFERENCES:
patent: 6245626 (2001-06-01), Chen et al.
patent: 2001/0041427 (2001-11-01), Gehrke et al.
patent: 2003/0102476 (2003-06-01), Romano et al.
patent: 1020070056585 (2007-06-01), None
Hong Chang-Ki
Kim Yu-Kyung
Lee Kun-Tack
Shim Woo-Gwan
Garber Charles D
Isaac Stanetta D
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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