Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
Patent
1995-10-02
1997-06-24
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having junction gate
438931, 438945, H01L 21265, H01L 2120
Patent
active
056416954
ABSTRACT:
An implant mask (14) and an etch mask (16) are utilized in forming a silicon carbide JFET (10). A source opening (17) and a drain opening (18) are formed in the masks (14,16). The etch mask (16) is removed, and a source area (19) and a drain area 21 are implanted through the openings (17,18) and source and drain contact (23, 24) are formed. A protective layer (26) is used to form source and drain contacts (23,24). A gate contact (27) is utilized to ensure the gate (28) is self-aligned to the gate contact (27).
REFERENCES:
patent: 5378642 (1995-01-01), Brown et al.
Moore Karen E.
Weitzel Charles E.
Dutton Brian K.
Motorola
Niebling John
Parsons Eugene A.
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