Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-09-11
2010-10-05
Smith, Zandra (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S494000, C438S503000, C438S607000, C257S411000, C257S768000, C257SE21409, C257SE29255
Reexamination Certificate
active
07807538
ABSTRACT:
A metal insulator semiconductor field effect transistor (MISFET) having a strained channel region is disclosed. Also disclosed is a method of fabricating a semiconductor device having a low-resistance junction interface. This fabrication method includes the step of forming a gate electrode above a silicon substrate with a gate insulator film being sandwiched therebetween. Then, form a pair of heavily-doped p (p+) type diffusion layers in or on the substrate surface at both sides of the gate electrode to a concentration of 5×1019atoms/cm3or more and yet less than or equal to 1×1021atoms/cm3. Next, silicidize the p+-type layers by reaction with a metal in the state that each layer is applied a compressive strain.
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Kinoshita Atsuhiro
Koga Junji
Tsuchiya Yoshinori
Yamauchi Takashi
Duong Khanh B
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Smith Zandra
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