Method of forming a semiconductor structure comprising...

Details Method of forming a semiconductor structure comprising... Method of forming a semiconductor structure comprising...

2007-07-03

2007-07-03

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S197000, C438S283000, C438S637000, C257SE21409

Reexamination Certificate

active

11114262

ABSTRACT:
A semiconductor structure comprising a first transistor element and a second transistor element is provided. Stress in channel regions of the first and the second transistor element is controlled by forming stressed layers having a predetermined stress over the transistors. The stressed layers may be used as etch stop layers in the formation of contact vias through an interlayer dielectric formed over the transistors.

REFERENCES:
patent: 6984564 (2006-01-01), Huang et al.
patent: 7205615 (2007-04-01), Tsutsui et al.
patent: 2003/0181005 (2003-09-01), Hachimine et al.
patent: 2004/0104405 (2004-06-01), Huang et al.
patent: 2004/0142545 (2004-07-01), Ngo et al.
patent: 2004/0159834 (2004-08-01), Huang et al.
Shimizu et al., “Local Mechanical-Stress Control (LMC): A New Technique for CMOS-Performance Enhancement,” 2001 IEEE, 19.4.1-19.4.4.

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