Adhesive bonding and miscellaneous chemical manufacture – Methods – Surface bonding and/or assembly therefor
Reexamination Certificate
1998-09-22
2001-05-15
Mayes, Curtis (Department: 1734)
Adhesive bonding and miscellaneous chemical manufacture
Methods
Surface bonding and/or assembly therefor
C156S252000, C264S610000
Reexamination Certificate
active
06231707
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to multilayer ceramic substrates and a method for forming same, and more particularly, relates to multilayer ceramic substrates, and a method for forming same, having multiple layers with the same number and pattern of vias with some of the vias being electrically conducting and the remainder being non-electrically conducting.
Ceramic packages for supporting semiconductor devices and the like are comprised of a ceramic substrate with printed conductive stripes connected to the device and to input/output pins or other connections with are joined to boards or the like. While many techniques are known for forming such ceramic substrates, one of the most popular procedures for such fabrication involves the casting of what is termed a ceramic greensheet, stacking it with other ceramic greensheets and the subsequent processing and firing of the stack of ceramic greensheets. The method of producing such multilayer ceramic (hereafter MLC) substrates for semiconductor packaging and other electronics applications is well known as illustrated in Herron et al. U.S. Pat. No. 4,234,367, Hetherington et al. U.S. Pat. No 4,302,625, and Rellick U.S. Pat. No. 4,799,984, the disclosures of which are incorporated by reference herein.
In this MLC substrate technology, greensheets of ceramic powder held together in sheet form by a suitable aqueous or organic binder are punched to form via holes in a predefined pattern, the via holes subsequently filled with a conductive paste, and metallurgy lines formed on the surface of the greensheet by screening or extrusion printing. The conductive paste is formed of a suitable metallic material which will withstand the subsequent sintering process. The metallized sheets are stacked, laminated and fired in an appropriate atmosphere to form a monolithic MLC substrate with a complex internal circuitry.
It is convenient to punch the via holes with a tool of the type disclosed in Kranik et al. U.S. Pat. No. 4,425,829, the disclosure of which is incorporated by reference herein, where a so-called “gang punch” tool may be utilized where a punch die and accompanying punches cooperate to punch greensheets at desired locations. Alternatively, as disclosed in Fleet et al. U.S. Pat. No. 4,821,614, the disclosure of which is incorporated by reference herein, the punch tool is programmable and punches vias at desired locations.
In the traditional method of building MLC substrates as disclosed in the above patents, each layer has a unique via pattern so the punch tool may be programmable in order to punch each individual layer. Alternatively, each layer may be gang punched but this requires a separate punch die and punches for each layer.
Using a programmable punch tool to punch each layer is flexible but slow so that many programmable punch tools are needed in a manufacturing environment to handle the expected large number of greensheets to be punched. Gang punching the greensheets is fast but to build a separate punch die and punches for each separate layer is expensive.
Accordingly, a new way of handling the punching of greensheets is desired.
Hargis U.S. Pat. No. 5,302,219, the disclosure of which is incorporated by reference herein, discloses forming the same pattern of vias in each of a plurality of greensheets and then filling some of the vias with metallic paste and the remainder with non-conductive (e.g., ceramic) paste. Filling the remaining vias with the non-conductive paste represents a costly, second screening step.
Thornberg U.S. Pat. No. 5,360,948, the disclosure of which is incorporated by reference herein, discloses a programmable substrate where thin film signal layers are formed and then vias are formed down to the signal layers. The vias may then be filled with metallic material or may be left unfilled as desired. The filled vias may then be connected on the surface in a desired manner to form a programmable substrate. This reference is directed to connecting vias on the surface of the substrate and is not meant to connect the vias within the interior of the substrate.
Thus, a purpose of the present invention is to have a new method for the forming of vias in greensheets where only selected vias in a greensheet are in electrical contact with vias in another greensheet.
BRIEF SUMMARY OF THE INVENTION
A first aspect of the invention relates to a method of forming a multilayer ceramic substrate, the method comprising the steps of:
obtaining a plurality of greensheets, each of the greensheets comprising a binder material and ceramic particles;
punching a plurality of vias in each of the greensheets, the pattern and number of vias in each of the greensheets being the same, the plurality of vias in each of the greensheets consisting of a first plurality of vias and a second plurality of vias;
filling the first plurality of vias in each of the greensheets with an electrically conducting paste;
avoiding the filling of the second plurality of vias in each of the greensheets with a paste comprising metallic or ceramic particles;
optionally filling at least some of the second plurality of vias in at least one of the greensheets with a fugitive material;
stacking the plurality of greensheets in a predetermined order to form an unsintered multilayer ceramic substrate; and
sintering the unsintered multilayer ceramic substrate, wherein the binder material and fugitive material are removed, thereby resulting in a sintered multilayer ceramic substrate.
A second aspect of the invention relates to a multilayer ceramic substrate comprising:
a first layer having a first plurality of vias being filled with electrically conducting material and a second plurality of vias being devoid of any material;
second layer, adjacent to the first layer, having a first plurality of vias being filled with electrically conducting material and a second plurality of vias being devoid of any material;
wherein at least some of the first plurality of vias and the second plurality of vias, respectively, in the first layer being in alignment with at least some of the first plurality of vias and the second plurality of vias in the second layer.
REFERENCES:
patent: 4234367 (1980-11-01), Herron et al.
patent: 4302625 (1981-11-01), Hetherington et al.
patent: 4425829 (1984-01-01), Kranik et al.
patent: 4799984 (1989-01-01), Rellick
patent: 4821614 (1989-04-01), Fleet et al.
patent: 5302219 (1994-04-01), Hargis
patent: 5354599 (1994-10-01), McClanahan et al.
patent: 5360948 (1994-11-01), Thornberg
Gupta Dinesh
Herron L. Wynn
Knickerbocker John U.
Long David C.
Nayak Jawahar P.
Blecker Ira D.
International Business Machines - Corporation
Mayes Curtis
LandOfFree
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