Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-11-25
2000-12-19
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438300, 438301, H01L 21336
Patent
active
061626945
ABSTRACT:
A metal gate electrode formed with high temperature activation of source/drain and LDD implants and a process for manufacture. A polysilicon alignment structure is formed on a silicon substrate. Source/drain regions are formed in alignment with the polysilicon alignment structure, and the alignment structure and the substrate are subjected to a first rapid thermal anneal. LDD implant regions are formed and the alignment structure and the substrate having the LDD regions are subjected to a second rapid thermal anneal. The polysilicon alignment structure is replaced with a metal gate electrode and gate dielectric.
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Stanley Wolf Ph.D. and Richard N. Tauber Ph.D. in Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, pp. 57 and 384, Jan. 1986.
Wolf V. I as applied to claim 1 above, and further in view of Stanley Ph.D. in Silicon Processing for the VSLI Era, vol. 2: Process Integration, Lattice Press, pp. 238 and 239, Jan. 1990.
Cheek Jon
Gardner Mark I
Wristers Derick
Advanced Micro Devices , Inc.
Bowers Charles
Brewster William M.
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