Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-07-02
2000-01-25
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438259, 438302, 438524, H01L 218247
Patent
active
060177934
ABSTRACT:
A method is provided for forming a memory cell in a nonvolatile semiconductor memory device having MOSFET configuration from a data memory section having two-layer gate construction and series select transistors formed between a control gate connected to the data memory section and the exposed side walls of the semiconductor substrate. According to this method, a polycrystalline semiconductor film that forms floating gates and an underlying gate oxide film are processed by dry etching using a photoresist. Next, the semiconductor substrate is cut to a prescribed depth by dry etching to expose side walls of the semiconductor substrate, following which impurities are ion injected into the semiconductor substrate to form a diffused impurity layer. Finally, an intergate insulation film that forms a control gate and a polycrystalline semiconductor film are stacked and processed.
REFERENCES:
patent: 5019527 (1991-05-01), Ohshima et al.
patent: 5382534 (1995-01-01), Sheu et al.
patent: 5445981 (1995-08-01), Lee
Chaudhari Chandra
NEC Corporation
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