Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-04-09
2002-08-13
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S532000
Reexamination Certificate
active
06432786
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating integrated circuits, and more particularly, to a method of forming a gate oxide layer with an improved ability to resist process damage.
2. Description of the Prior Art
As the complementary metal-oxide semiconductor (CMOS) process enters a deep sub-micron epoch (<0.35 &mgr;m), there is increasing demand for the reliability of a gate oxide layer whose depth is continuously decreased. In the techniques of substituting for a conventional oxide layer, adding a small amount of nitrogen into the gate oxide layer to form a nitrided oxide (oxynitride) layer is most often studied. This is because the oxynitride layer not only keeps extremely good interface characteristics between a silicon oxide layer and a silicon substrate, but also has greater ability to resist electricity compared with silicon oxide. The main efficacy of the oxynitride layer is to restrain a boron-penetrating effect in a p-type transistor, and to decrease the aggravation of hot carriers in the p-type transistor. For example, when the oxynitride layer is utilized to control an interface between a polysilicon gate and an oxide layer, the boron-penetrating effect is noticeably restrained and the reliability of the oxide layer is maintained. Otherwise, when the oxynitride layer is utilized to control an interface between an oxide layer and a silicon substrate, there is a better defense against the effects of hot carrier passage. However, the degree of improvement as described above depends on the variation in the Si—N bonding appearance, and depends on the number of nitrogen atoms since too many nitrogen atoms will deteriorate the mobility of the carriers and generate oxide charges.
The number of nitrogen atoms in the oxynitride layer is closely related to various nitride treatments. With reference to the methods of growing the oxynitride layer in the present literature, they are concluded hereinafter. (1) Grow or anneal a gate oxide layer in a N
2
O or NO atmosphere. (2) Dope N
2
+
or N
+
into a substrate and then grow a gate oxide layer. (3) Perform a thermal nitridation on a substrate and then grow a gate oxide layer. (4) Perform a downstream plasma nitridation. (5) Deposit silicon nitride by jet vapor deposition (JVD) to form a gate dielectric layer. Owing to the likelihood of integrated circuit (IC) developing toward system-on-chip (SOC) configurations in the future, the method of growing the oxynitride layer on the nitride-dopant substrate which can grow many gate oxide layers of varied depths to fit the demand for different circuit devices is receiving considerable industry attention.
Additionally, fluorine, like nitrogen, is also usually used in ICs processing. As disclosed in literatures, appropriately doping the fluorine ion into the polysilicon gate and then performing a high-temperature drive-in process can diffuse the fluorine ion to a Si/SiO
2
interface and thereby effectively resist the hot carrier effect. It is believed that the Si—F bonding formed by bonding the fluorine and the dangling bonds of the silicon to have stronger bonding energy (5.73 ev) than that of Si—O, Si—Si and Si—H (3.18 ev) is the main mechanism responsible for effectively resisting the stress of the hot carriers. However, if excess fluorine atoms are doped, the excess fluorine atoms will substitute for more Si—O bondings to make great non-bonding oxygen atoms move toward the Si/SiO
2
interface. This promotes the formation of an interface trap and causes more defects when hot carriers enter. Also, the stress-releasing effect is reduced to cause a decline in the characteristics of the device. Moreover, the fluorine atoms doped in the polysilicon will speed up the boron-penetrating effect to make boron penetrate the gate oxide layer and the substrate, thereby causing a decline in the characteristics of the device, such as a reduction in an absolute value of threshold voltage (V
th
) or a drift in flat band voltage (V
fb
). Accordingly, a fluoride oxide layer is not popularly applied to ICs processing.
In addition, as ICs processing changes, dimensions of transistor devices are decreasing as the demand for device reliability increases. The diverse plasma processes applied to ICs production lines inflict latent destruction on semiconductor devices. Also, the increasingly complicated circuit wiring that plays the role of collecting the antenna intensifies the destruction caused by the plasma. The problem of the decrease in the yield and reliability of ICs products caused by the plasma, what is called the antenna effect, demands further study.
SUMMARY OF THE INVENTION
The object of the present invention is to solve the above-mentioned problems and provide a method of combining the nitride treatment and fluoride treatment to form a gate oxide layer with improved ability to resist process damage.
To achieve the above-mentioned object, the method comprises the steps of: providing a silicon substrate on which an isolating area and an element area are defined; growing a sacrificial oxide layer on the element area of the silicon substrate, and then doping nitrogen ions into the element area of the silicon substrate; removing the sacrificial oxide layer; growing an oxide layer on the silicon substrate in an oxygen atmosphere, wherein nitrogen ions inside the silicon substrate enters the oxide layer to become a nitrogen-containing gate oxide layer; depositing a polysilicon layer; performing a gate doping process on the polysilicon layer; performing a fluorine ion implantation on the polysilicon layer; and performing a high-temperature tempering procedure.
An advantage of the present invention is that its method combines the nitride treatment and the fluoride treatment to improve the reliability of the gate oxide layer. Also, the process is simple, practical, and compatible with ICs processing without requiring extra process or the fabrication of additional masks. Furthermore, the fluoride oxynitride layer fabricated in the present invention can be applied to the p-type device to improve the reliability of the gate oxide layer and prevent the p-type device being damaged by the boron-penetrating effect. Since nitrogen implantation is applied to the SOC technique, the range of potential industry applications is growing daily.
This and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment which is illustrated in the various figures and drawings.
REFERENCES:
patent: 4748131 (1988-05-01), Zietlow
patent: 5382533 (1995-01-01), Ahmad et al.
patent: 5571734 (1996-11-01), Tseng et al.
patent: 5599726 (1997-02-01), Pan
patent: 5605848 (1997-02-01), Ngaoaram
patent: 5712208 (1998-01-01), Tseng et al.
patent: 5714788 (1998-02-01), Ngaoaram
patent: 5780330 (1998-07-01), Choi
patent: 5831319 (1998-11-01), Pan
patent: 2001/0039093 (2001-11-01), Oohashi
Wolf,Stanley “Sllicon Processing For The VLSI Era: vol. 1: Process Technology”, pp. 181-183, Lattice Press, 1986.*
Wolf, Stanley “Silicon Processing For The VLSI Era: vol. 2: Process Integration”, pp. 434-435, Lattice Press, 1990.
Chang Chun-Yen
Chen Chi-Chun
Huang Tiao-Yuan
Lin Horng-Chih
Johnson Kindess PLLC
Lebentritt Michael S.
National Science Council
O'Connor Christensen
LandOfFree
Method of forming a gate oxide layer with an improved... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a gate oxide layer with an improved..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a gate oxide layer with an improved... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2931680