Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-10-31
2004-11-16
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S305000, C438S268000
Reexamination Certificate
active
06818506
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a method of forming a gate electrode in a semiconductor device, more particularly, to a method of forming a polysilicon film used as a gate electrode of a cell transistor in a flash memory being a non-volatile memory device.
2. Description of the Prior Art
A cell transistor in a flash memory device being a non-volatile memory device has a tungsten silicide (WSi
X
) film as a gate electrode stacked in a polysilicon film in order to increase an operating speed of the device. At this time, a doped polysilicon film into which a dopant P (phosphorous) is in-situ implanted is employed in order to use the polysilicon film as the gate electrode.
Meanwhile, after the doped polysilicon film is deposited, an oxide film formed on the surface of the doped polysilicon film is removed to lower an interfacial resistance between the doped polysilicon film and the WSi
X
film upon a subsequent process of depositing WSi
X
. At this time, as shown in
FIG. 1
, the surface of the polysilicon film from which the oxide film is removed has a hydrophobic property. The doped polysilicon film used as the gate electrode is changed from the hydrophobic property to the hydrophilic property as the concentration of ‘P ’ used as a dopant is increased. As the oxide film is removed from the surface of the doped polysilicon film, however, the doped polysilicon film has a medium state between the hydrophobic property and the hydrophilic property that is not completely the hydrophilic property. As such, as a watermark can easily occur at the doped polysilicon film having the medium state between the hydrophobic property and the hydrophilic property as shown in
FIG. 2
, the watermark is generated at the interface between the doped polysilicon film and the WSi
X
film. This watermark causes to degrade a characteristic of the semiconductor device.
In order to solve the above problem, as shown in
FIG. 3
, a technology for preventing generation of the watermark has recently been employed by which the surface of the polysilicon film from which the oxide film is removed becomes the hydrophobic property by means of a cleaning process, by stacking a doped polysilicon film
10
a
and an undoped polysilicon film
10
b
at a given ratio instead of the doped polysilicon film
10
a
used as a control gate electrode
10
and forming an interface contacting to the WSi
X
film
20
using the undoped polysilicon film
10
b.
The polysilicon film formed thus has a deposition temperature ranging from 530 to 570° C. in order to obtain a grain size of the polysilicon film that can be suitably used as the gate electrode. At a temperature below 530° C., there is a possibility that the grain size of the polysilicon film is abnormally grown in the process of depositing the doped polysilicon film and the undoped polysilicon film. If the grain size is abnormally grown, the gate dielectric film or the oxide film may be damaged to degrade an operating performance of the transistor. Further, at a temperature over 570° C., the growth of HSG (hemi spherical grain) is activated in the process of depositing the undoped polysilicon film after the doped polysilicon film is deposited. This causes a severe curve at the interface of the polysilicon film to lower an adhesive force with the WSi
X
film. As a result, there is a problem that the polysilicon film may not be used as the electrode.
However, at a deposition temperature of 530 through 570° C. for forming the polysilicon film having an adequate grain size, ‘P’ is precipitated into the grain boundary of an underlying doped polysilicon film upon the process of depositing the undoped polysilicon after the doped polysilicon film is deposited. As this precipitation point serves as a seed, the seed is abnormally grown. Due to this, a given alien substance is formed on the surface of the polysilicon film. As this alien substance serves as a defect in a subsequent process, the progress of the process and an operation of the device are adversely affected to reduce the yield.
SUMMARY OF THE INVENTION
The present invention is contrived to solve the above problems and an object of the present invention is to provide a method of forming a gate in a semiconductor substrate capable of preventing generation of an alien substance on the surface of a doped polysilicon film to implement a gate electrode without any defect, in a way that deposition processes for forming doped and undoped polysilicon films constituting a gate electrode are performed at difference temperatures.
In order to accomplish the above object, a method of forming a gate electrode in a semiconductor device having a structure in which a doped polysilicon film and an undoped polysilicon film are stacked on a semiconductor substrate according to the present invention, is characterized in that the doped polysilicon film and the undoped polysilicon film are deposited at different temperatures.
Further, a method of forming a gate electrode in a semiconductor device according to the present invention, is characterized in that it comprises the steps of forming a gate oxide film on a semiconductor substrate; forming a floating gate electrode on the gate oxide film; forming a dielectric film on the floating gate electrode; depositing a doped polysilicon film and an undoped polysilicon film on the dielectric film at different temperatures to form a control gate of a stack structure; and forming a silicide layer on the undoped polysilicon film.
REFERENCES:
patent: 4693782 (1987-09-01), Kikuchi et al.
patent: 5120673 (1992-06-01), Itoh
patent: 5480830 (1996-01-01), Liao et al.
patent: 5652166 (1997-07-01), Sun et al.
patent: 5877074 (1999-03-01), Jeng et al.
patent: 6054359 (2000-04-01), Tsui et al.
patent: 6117755 (2000-09-01), Kun-Yu et al.
patent: 6127712 (2000-10-01), Wu
patent: 6153469 (2000-11-01), Yun et al.
patent: 6222201 (2001-04-01), Liu et al.
patent: 6326261 (2001-12-01), Tsang et al.
patent: 6417099 (2002-07-01), Tsai et al.
patent: 6596599 (2003-07-01), Guo
patent: 2001-0008559 (2001-02-01), None
patent: 2001-0059611 (2001-07-01), None
Dong Cha Deok
Joo Kwang Chul
Lindsay Jr. Walter L.
Niebling John F.
Piper Rudnick LLP
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