Method of forming a crystalline insulation layer on a...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers

Reexamination Certificate

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C427S126100, C427S126300

Reexamination Certificate

active

06232242

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method of producing a substrate for a semiconductor device, such as an SOI substrate and a substrate for a FET which has an MFS structure (metallic film/ferroelectric film/semiconductor layer structure), which is suitable for crystal growth of a semiconductor layer or a ferroelectric layer on a silicon substrate wherein an intevening amorphous insulation layer is formed. More particularly, the present invention relates to a method of forming a substrate for a semiconductor device in which a crystalline insulation layer may be grown with an intervening insulation layer which has an excellent insulation characteristic on a silicon substrate for the purpose of growing a semiconducting crystal layer, a ferroelectric crystal layer, etc., and to a method of manufacturing such a substrate.
In relation to an SOI substrate for growing a semiconducting crystal layer on an insulation layer, for instance, among known methods are a method which requires bonding two silicon substrate seating oxide films with each other and polishing one of the two substrates to thereby leave a thin semiconductor layer. Another method requires injecting oxygen or the like at a surface of a silicon substrate to a constant depth and then annealing so that an insulation layer is buried in a semiconductor substrate.
Meanwhile, in a semiconductor memory device using a ferroelectric layer, the ferroelectric layer is formed on a semiconductor layer or on a surface of an electrode metal such as platinum with an intervening insulation film. In an MFS structure in which a ferroelectric layer is formed on a semiconductor layer, an oxide film is formed between the ferroelectric layer and the semiconductor layer, thereby degrading a crystal quality or morphology, or an interface state density between the ferroelectric layer and the semiconductor layer becomes large. Where the ferroelectric layer is formed on an insulation film, it is not possible to grow a ferroelectric layer which has an excellent crystal quality on the insulation film which is amorphous.
As described above, during fabrication of a semiconductor device, while it is necessary to epitaxially grow a semiconductor layer or a crystalline ferroelectric layer on a semiconductor substrate through an insulation layer in some cases, since the insulation layer is amorphous, it is not possible to grow a crystalline layer directly on a surface of the insulation layer.
Further, in the method which requires polishing one of the bonded silicon layers for thinning the one silicon layer, it is extremely difficult to polish the silicon layer into a uniformly thin layer. Furthermore, polishing is laborious. Therefore, a quality crystalline surface is difficult to obtain. In the method which requires injecting oxygen at a surface layer portion of a semiconductor substrate, ion bombardment greatly degrades a surface of a semiconductor layer. Therefore, in this method a high quality crystalline surface is also difficult to obtain. As a result, a crystal layer which is formed on such a deteriorated crystalline surface has a deteriorated crystal quality.
On the other hand, the inventors of the present invention invented a method of epitaxially growing an YSZ thin film on a silicon substrate and presented the method to Shingaku Gihou (ED96-42, CPM96-27, May 1996). This method makes it possible to obtain a crystalline insulation layer on a silicon substrate and epitaxially grow a semiconductor layer or a ferroelectric layer on a surface of the YSZ. However, since a YSZ thin film which is formed on a silicon substrate is a crystalline metallic oxide film and hence migrates ions, electric insulation of the YSZ thin film is inferior to that of a silicon oxide film or a silicon nitride films. Therefore, the YSZ thin film slightly degrades electric characteristics.
SUMMARY OF THE INVENTION
The present invention has been made to solve such problems. Accordingly, an object of the present invention is to provide a substrate for a semiconductor device which is suitable to grow a crystal layer, such as a semiconductor layer and a ferroelectric layer, on another semiconductor layer having an intervening insulation layer during fabrication of a semiconductor device and which sufficiently improves electric insulation against a silicon substrate which serves as a base.
Another object of the present invention is to provide a method of forming a crystalline insulation layer on a semiconductor layer having an intervening insulation silicon compound.
A substrate for a semiconductor device according to the present invention comprises a crytalline silicon substrate, an insulation silicon compound layer which is formed on the silicon substrate, and a crystalline insulation layer which is epitaxially grown on the insulation silicon compound layer.
As herein termed, a “substrate for a semiconductor device” refers to a base for growing crystalline semiconductor layers and ferroelectric layers one atop the other, but not a complete base for a semiconductor device. In this context, a “substrate for a semiconductor device” covers a structure that an insulation silicon compound layer or a ferroelectric layer is formed in a portion of a semiconductor device, or on a stacked semiconductor layer, etc.
Where the crystalline insulation layer is formed by at least one species which is selected from a group of YSZ (yttria stabilized zirconia), Al
2
O
3
(sapphire), CeO
2
(ceria), MgO (magnesia) and ZrO
2
(zirconia) and the insulation silicon compound layer is formed by at least one of silicon oxide, silicon nitride and silicon nitride oxide, a substrate for a semiconductor device which is particularly excellent in insulation and crystalline characteristics is obtained.
A method of manufacturing a substrate for a semiconductor device according to the present invention comprises the steps of:
growing a crystalline insulation layer on a silicon substrate by sputtering a metal which forms said crystalline insulation layer from a target, and chemically combining with reactive gas around said silicon substrate; and
forming an insulation silicon compound layer by applying a voltage to said silicon substrate so that ions of said reactive gas around said substrate are attracted to a surface of said silicon substrate and chemically combined with silicon.
More specifically, the silicon substrate and the target are disposed facing each other within a reactive sputtering apparatus, the reactive gas is supplied into the apparatus in such a manner that there is a larger amount of the reactive gas around the substrate than around the target, and inert gas which is supplied into the apparatus is discharged and the crystal layer of the crystalline insulation substance is grown, whereby the substrate for a semiconductor device is obtained. Even more specifically, the target may be a composite target or an alloy target of zirconium (Zr) and yttrium (Y), the reactive gas may be oxygen, the crystalline insulation layer may be YSZ, and the insulation silicon compound may be silicon oxide.
When Ce, Al, Mg or Zr is used as the target, it is possible to grow CeO
2
, Al
2
O
3
, MgO or ZrO
2
, respectively, as the crystalline insulation layer.
The reactive gas may be supplied into the sputtering apparatus with the target covered with a cover which has an opening at a portion of the target which faces the silicon substrate. This simple structure allows deposition of a metal layer on the substrate without chemically combining the target as well as epitaxial growth of a compound of the metal of the target and the reactive gas on the substrate to form a crystalline insulation layer.


REFERENCES:
patent: 4661176 (1987-04-01), Manasevit
patent: 5248564 (1993-09-01), Ramesh
patent: 5270298 (1993-12-01), Ramesh
patent: 5801105 (1998-09-01), Yano et al.
patent: 5919515 (1999-07-01), Yano et al.
patent: 6045626 (2000-04-01), Yano et al.

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