Method of forming a CMOS sensor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S057000

Reexamination Certificate

active

06194260

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a fabrication of semiconductor integrated circuits (ICs), and more particularly to a method of forming a complementary metal-oxide semiconductor (CMOS) sensor.
2. Description of the Related Art
Charge-coupled devices (CCDs) have been the mainstay of conventional imaging circuits for converting light into an electrical signal that represents the intensity of the energy. CCD applications include monitors, transcription machines and cameras. Although CCDs have many strengths, CCDs use is restricted by their high cost and their volume. To reduce their cost, dimensions and energy consumption, a CMOS photo diode device has been develop. Because a CMOS photo diode device can be produced using conventional techniques, the cost and the volume of the sensor can be reduced. CMOS photo diode applications include PC cameras, digital cameras, etc.
A photo diode based on the theorem of a P-N junction can convert light into an electrical signal. Before energy in the form of photons strikes the photo diode, there is an electric field in the P-N junction. The electrons in N region do not diffuse towards P region and the holes in P region do not diffuse towards N region. When enough light strikes the photo diode, the light creates a number of electron-hole pairs. The electrons and the holes diffuse towards the P-N junction. When the electrons and the holes reach the P-N junction as a result of the effect of the inner electric field across the junction, the electrons flow to the N region and the holes flow to the P region. Thus a current is induced between the P-N junction electrodes. Ideally, a photo diode in the dark is an open-circuit. In other words there is no current induced by light while a photo diode is in the dark.
FIG. 1
is a schematic, cross-sectional view of a portion of a semiconductor device showing a conventional CMOS sensor. In
FIG. 1
, the conventional CMOS sensor includes a P-type substrate
100
, a field oxide layer
104
, a P-type well
110
, a gate structure
120
, an N-type source/drain region
122
, an N-type sensor region
124
, an depletion region
126
, and a borophosphosilicate glass/silicon nitride glass dielectric layer
134
.
When a light beam
140
passes through the depletion region
126
which works as a P-N junction, the depletion region
126
is excited and a number of electron-hole pairs are created. Thus the light is converted into an electric signal.
However, with respect to a CMOS image sensor, transmittance of light for the semiconductor structure used in a semiconductor image sensor is an important factor that seriously influences the quality of the image sensor. For example, it the imperative that the light transmittance is high enough. Only a high transmittance enables the light to arrive at the depletion region with a sufficiently high electric field in the semiconductor substrate. Upon arrival, the transmitted light induces electron-hole pairs due to excitation of photo-energy and thereby produces current in the intrinsic depletion region when light with varied wavelength transmits into the depletion region.
In general, the depletion region of a CMOS image sensor is formed far away from the surface of the semiconductor substrate. Since the wavelength of blue light, about 460 nanometers, is shorter than that of red light and green light, most of the blue light passing through the CMOS image sensor cannot arrive at the depletion region. The poor transmittance of the blue light causes the semiconductor substrate to receive insufficient light energy for current induction, leading to erroneous information.
Furthermore, a sensor region of a conventional CMOS image sensor is formed by implantation. The sensor region and the source/drain region of the CMOS image sensor are formed at the same implanting step so that the sensor region and the source/drain region have the same impurity varieties and the same implanting concentration. Arsenic (As) is usually doped into the substrate to form the source/drain region with a concentration of about 1×10
15
atoms/cm
2
. As is heavier than phosphorous (P) and is doped into the substrate with a high energy of about 80 Kev so that the sensor region may be damaged from the high energy and the heavy atoms. The damage to the sensor region induces substrate leakage.
SUMMARY OF THE INVENTION
The invention provides method of forming a CMOS sensor. Shallow first doped regions are formed in a provided substrate beside a gate electrode which is on the substrate. One of the shallow first doped region is defined as a source/drain area. Another of the shallow first doped region is defined as a sensor area. A spacer is formed on the sidewall of the gate electrode. A first mask is provided to expose a part of the predetermined sensor area. A second doped region is formed within the predetermined sensor area by implanting. In the predetermined sensor area, the second doped region is deeper than the first doped region. The sensor region is composed of the first doped region and the second doped region. The shallow first doped region can enhance the response ability for blue light passing through the sensor region. The deep second doped can maintain the response ability for red light and for green light passing through the sensor region.
A second mask is provided to expose the predetermined source/drain area. A second doped region within the predetermined source/drain area is thus formed by implanting. The first doped region and the second doped region within the predetermined source/drain area constitute a source drain region with a lightly doped drain (LDD) region.
The invention provides a method for forming a CMOS sensor, in which the steps of forming the sensor region and the steps of forming the source/drain region are different. The source/drain region may be formed after forming the sensor region or before forming the sensor region. The first doped region and the second doped region within the sensor region contain phosphorus as impurity without the damage from implanting arsenic. The third doped region within the source/drain region contains arsenic as impurity, by which the conductivity of the source/drain region can be maintained.


REFERENCES:
patent: 6096573 (2000-08-01), Chen

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