Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-03-09
2000-08-01
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438251, 438649, 438253, H01L 218242
Patent
active
060966009
ABSTRACT:
The phosphorus concentration of an upper electrode and the phosphorus concentration of a lower electrode can be made equally high without loss of adhesion between the polysilicon and a metallic layer. It includes a step of forming a stacked layer structure consisting of: a lower electrode layer provided on an underlay, a dielectric layer provided on this lower electrode layer, and an upper electrode layer consisting of an impurity-doped layer and a metallic layer successively provided on this dielectric layer, and a step of doping the metallic layer with the same impurity as the impurity in the impurity-doped layer prior to heat treatment of the stacked layer structure.
REFERENCES:
patent: 5618749 (1997-04-01), Takahashi et al.
patent: 5631188 (1997-05-01), Chang et al.
OKI Electric Industry Co., Ltd.
Tsai Jey
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