Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-11-18
2011-11-15
Chen, Jack (Department: 2893)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S589000, C438S197000, C257SE21431
Reexamination Certificate
active
08058133
ABSTRACT:
A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.
REFERENCES:
patent: 6812103 (2004-11-01), Wang et al.
patent: 2006/0073664 (2006-04-01), Kondo et al.
patent: 2006/0270133 (2006-11-01), Yasutake
Lan Bang-Chiang
Lin Yu-Hsin
Liu Yi-Cheng
Tsai Chen-Hua
Tsai Cheng-Tzung
Chen Jack
King Justin
United Microelectronics Corp.
WPAT. P.C.
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