Method of fabricating trench MOS

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438270, 438275, 438259, H01L 21336

Patent

active

060016922

ABSTRACT:
A semiconductor device includes a substrate, a plurality of active regions on the substrate, the active regions having recessed and elevated types and being alternatively in parallel with the substrate, respectively, and a plurality of first and second field insulating layers at field regions adjacent to the active regions, the first field insulating layer being parallel with the substrate and the second field insulating layer being perpendicular to the substrate.

REFERENCES:
patent: 4580330 (1986-04-01), Pollack et al.
patent: 5049515 (1991-09-01), Tzeng
patent: 5083173 (1992-01-01), Yamada et al.
patent: 5180680 (1993-01-01), Yang
patent: 5414287 (1995-05-01), Hong
patent: 5460989 (1995-10-01), Wake
patent: 5780340 (1998-07-01), Garder et al.
patent: 5801416 (1998-09-01), Choi et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of fabricating trench MOS does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating trench MOS, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating trench MOS will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-862737

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.