Method of fabricating transistor including buried insulating...

Details Method of fabricating transistor including buried insulating... Method of fabricating transistor including buried insulating...

2005-10-24

2008-10-14

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21430

Reexamination Certificate

active

07435657

ABSTRACT:
In a method of fabricating a transistor including a buried insulating layer and transistor fabricated using the same, the method includes sequentially forming a sacrificial layer and a top semiconductor layer on a single crystalline semiconductor substrate. A gate pattern is formed on the top semiconductor layer. A sacrificial spacer is formed to cover sidewalls of the gate pattern. An elevated semiconductor layer is grown on a portion of the top semiconductor layer adjacent to the sacrificial spacer. The sacrificial spacer is removed. A portion of the top semiconductor layer from which the sacrificial spacer is removed is etched until the sacrificial layer is exposed, thereby forming a recess, which separates the top semiconductor layer into a first top semiconductor layer pattern and a second top semiconductor layer pattern, which remain under the gate pattern and the elevated semiconductor layer, respectively. The sacrificial layer is selectively removed. A buried insulating layer is formed to fill a region from which the sacrificial layer is removed. A buried semiconductor layer is grown in the recess. An extending recess extends from the recess and is formed to expose the semiconductor substrate. The extending recess separates the buried insulating layer into a first buried insulating layer pattern and a second buried insulating layer pattern, which are self-aligned to the first and second top semiconductor layer patterns, respectively.

REFERENCES:
patent: 5869359 (1999-02-01), Prabhakar
patent: 6084271 (2000-07-01), Yu et al.
patent: 6365445 (2002-04-01), Yu
patent: 6429055 (2002-08-01), Oh
patent: 09-074189 (1997-03-01), None
patent: 1998-049920 (1998-09-01), None

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