Method of fabricating transistor

Details Method of fabricating transistor Method of fabricating transistor

2000-01-13

2001-04-17

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S253000, C438S396000, C438S398000, C438S780000

Reexamination Certificate

active

06218244

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 88121709, filed Dec. 10, 1999.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing dynamic random access memory (DRAM). More particularly, the present invention relates to a method of manufacturing a crown-shaped DRAM capacitor.
2. Description of the Related Art
A capacitor is a major element in a dynamic random access memory (DRAM). To reduce erroneous readings and to increase operating efficiency, capacitance of the DRAM capacitors must be increased. Capacitance of a DRAM capacitor can be increased by enlarging the effective surface area. Effective surface area can be expanded by shaping the capacitor into a crown and forming hemispherical grains (HSGs) over the capacitor surface.
The conventional method of forming a crown-shaped capacitor includes filling with photoresist, chemical-mechanical polishing (CMP) and wet etching.
FIGS. 1A through 1D
are schematic cross-sectional views showing the steps for producing a conventional crown-shaped DRAM capacitor. In
FIG. 1A
, a silicon substrate
100
after with photoresist is shown. A dielectric layer
110
, a nitride layer
120
, a plug
160
, a patterned oxide layer
130
and a polysilicon layer
140
a
shaped into a crown are already formed over the silicon substrate
100
having a region
102
. After filling with photoresist, the crown-shaped polysilicon layer
140
a
is covered by a photoresist layer
150
. The photoresist layer
150
is able to resist the intrusion of slurry into the crown-shaped area during chemical-mechanical polishing.
FIG. 1B
shows the structure in
FIG. 1A
after a chemical-mechanical polishing operation. As shown in
FIG. 1B
, a portion of the photoresist layer
150
and polysilicon layer
140
a
are removed to form an embedded crown-shaped polysilicon capacitor
140
b.
FIG. 1C
shows the structure in
FIG. 1B
after the removal of the photoresist layer
150
and the removal of the oxide layer
130
by wet etching. A crown-shaped capacitor
140
b
is shown above the substrate
100
.
After forming the crown-shaped capacitor
140
b
, a layer of hemispherical grains
170
is grown over the surface of the capacitor as shown in FIG.
1
D. Since the hemispherical grains can grow on the surface of the crown-shaped capacitor
140
b
as fast as the nitride layer
120
, many hemispherical grains
170
are also formed over the nitride layer
120
.
However, the aforementioned method of forming a crown-shaped capacitor has a few drawbacks. The steps involved are complicated, thereby increasing both production time and cost. In addition, selectivity of hemispherical grain growth is low. Hence, some of the hemispherical grains are likely to form over the nitride layer resulting in unwanted short-circuiting.
SUMMARY OF THE INVENTION
The invention provides a method of manufacturing a crown-shaped DRAM capacitor. A silicon substrate structure is first provided. The silicon substrate structure includes an oxide layer over the substrate and a polysilicon layer over the oxide layer. The polysilicon layer further includes a plug that penetrates the oxide layer. A patterned photoresist layer is next formed over the polysilicon layer. Spacers having a low etching rate are formed over the sidewalls of the photoresist layer by carrying out a chemical reaction next to the sidewalls of the photoresist layer. A dry etching operation is carried out to etch the unreacted photoresist layer and the polysilicon layer exposed by the openings in the photoresist layer. Using the spacers as an etching mask, a portion of the polysilicon layer under the photoresist layer is removed by continuing the dry etching operation. Finally, the spacers are removed to complete the operations necessary for forming the crown-shaped capacitor.
One condition of the etching operation that must be satisfied is that the etching rates of the oxide layer and the spacers should be much lower than the etching rates of the photoresist layer and the polysilicon layer. In addition, the spacers are preferably polymers formed by plasma polymerization. An advantage of the design is that the same plasma for dry etching is also used for plasma polymerization. Ultimately, the growth of spacers on the sidewalls of the photoresist layer and the dry etching operation can be combined and performed in the same step. Furthermore, the polysilicon layer under the photoresist layer is etched to a depth controlled by timing (rather than by the detection of etching stop). Hence, a crown-shaped capacitor having a suitable bottom thickness is more easily formed.
To attain a higher capacitance for the crown-shaped capacitor, hemispherical grains are grown on the surface of the capacitor so that effective surface area is further increased.
In the aforementioned method of manufacturing a crown-shaped capacitor, separate mechanisms are used to form the external profile, the bottom section and the crown section.
Since the etching rate of polysilicon exposed by the openings in the photoresist layer is the fastest, that portion of the polysilicon layer is removed the earliest to form the external profile of the crown-shaped capacitor.
Because the polysilicon layer under the photoresist layer is exposed only after the photoresist layer (not including the sidewall spacers) is completely removed, this portion of the polysilicon layer is etched a little later. Hence, a definite thickness of the polysilicon layer remains under the originally photoresist-covered region when all the polysilicon material under the openings is removed. This remaining portion of the polysilicon layer under the photoresist-covered region becomes the bottom section of the crown-shaped capacitor.
The etching rate of spacers is much lower than the etching rate of the polysilicon layer and the photoresist layer. Therefore, little of the spacer material is removed. Since the polysilicon layer under the spacers is well protected by the spacers, the crown section of the crown-shaped capacitor is hereby formed.
In addition, the etching rate of the oxide layer is much lower than that of the polysilicon layer and the photoresist layer. Hence, very little damage to the oxide layer occurs within the period starting from the complete removal of the polysilicon material under the opening to the end of the polysilicon etching in the photoresist-covered region.
Moreover, since the polysilicon etching process is controlled by timing, thickness of the bottom section of the crown-shaped capacitor is adjustable.
In other words, this invention utilizes the time differences in the initiation of etching in different portions of the polysilicon layer together with controlled timing to form a crown-shaped capacitor in a single dry etching operation. Unlike the conventional method, there is no need to perform photoresist filling, chemical-mechanical polishing or a wet etching operation in sequence. Hence, the number of processing steps and production cost is reduced. Another difference with the conventional method is that the crown-shaped capacitor is formed above an oxide layer. Since hemispherical grains grow much faster on polysilicon than oxide, most of the hemispherical grains grow on the crown-shaped polysilicon surface instead of the adjacent oxide layer. Thus, short-circuiting with nearby devices is greatly reduced.
Accordingly, the present invention provides a method of manufacturing crown-shaped DRAM capacitor capable of reducing the number of processing steps so that production time and cost can be minimized. In addition, the invention provides a method of manufacturing crown-shaped DRAM capacitor capable of preventing an internal short-circuit due to the growth of hemispherical grains over capacitor surface. Hence, a more stable DRAM product can be obtained.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

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