Method of fabricating thin integrated circuit units

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S118000, C438S125000, C438S613000, C257S686000, C257S724000, C257S738000, C257S783000, C228S180220

Reexamination Certificate

active

06468831

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates in general to the field of integrated circuit packaging and, more specifically, can relate to integrated circuit packages and a method for producing the same wherein the integrated circuit packages are electrically connected to one another to form a memory unit for use in attachment to a printed circuit board to form a module.
BACKGROUND OF THE INVENTION
Without limiting the scope of the invention, its background is described in connection with integrated circuit packages and memory modules, as an example.
Heretofore, in this field, integrated circuits have been formed on semiconductor wafers, which are separated into individual chips and the individual chips are then handled and packaged. The packaging process is one of the most critical steps in the integrated circuit fabrication process, both from the point of view of cost and of reliability. Specifically, the packaging cost can easily exceed the cost of the integrated circuit chip and the majority of device failures are generally packaging related.
The integrated circuit must be packaged in a suitable media that will protect it in subsequent manufacturing steps and from the environment of its intended application. Wire bonding and encapsulation are the two main steps in the packaging of individual integrated circuit packages. Wire bonding connects the leads from the chip to the terminals of the package. The terminals allow the integrated circuit package to be connected to other components. Following wire bonding, encapsulation is employed to seal the surfaces from moisture and contamination and to protect the wire bonding and other components from corrosion and mechanical shock.
SUMMARY OF THE INVENTION
Commonly, integrated circuit packages are attached printed circuit boards to form single inline memory modules, which are typically referred to as SIMMs. SIMMs may, for example, be used to increase the memory of, typically, personal computers. The amount of the memory on the SIMM, however, is generally limited by surface area of the mother or sister printed circuit board that supports the integrated circuit packages. As memory demands increase, so has the need for increased Input/Output (I/O) capacity and memory capacity of SIMMs. Efforts to enhance these capacities, however, have been limited by the amount or space available in the environment in which the modules operate.
Therefore, it is recognized herein that a need has arisen for a module (e.g. a memory module) and a process for producing a module that meets the present and future needs for expansion within the same limited space. Furthermore, a need has arisen for high density module and a process for producing high density modules that provide for attachment modules of integrated circuit packages to form modules. A need has also arisen for materials and methods that lead to increases, e.g., in I/O and/or memory capacity. Further, a need has arisen for a double-sided integrated circuit package, and modules made of the same, that provides protection to the wire bonding and silicon chip during subsequent manufacturing and testing steps and from the environment of its intended purpose.
The present invention disclosed herein comprises an apparatus and method of stacking double sided integrated circuit packages into an integrated circuit unit. The integrated circuit module protects the integrated circuit packages that make up the integrated circuit module during manufacturing and testing steps and from the environment of its intended purpose. The integrated circuit packages are stackably mounted together to form an integrated circuit unit and can be attached to a printed circuit mother or sister board to form a high density module.
The present invention comprises at least a first integrated circuit package and a second integrated circuit package that are stackably and electrically connected together to form an integrated circuit unit. Even though the invention is described in terms of first and second integrated circuit packages for simplicity and convenience, it is to be understood that any number of integrated circuit packages may be stacked to form the integrated circuit unit using the materials and techniques described herein. For example, seven to nine integrated circuit packages may be stacked to form an integrated circuit memory unit in accordance with the present invention.
The first and second integrated circuit packages each include a carrier having first and second surfaces. A plurality of routing strips are integral with the carrier and extend into the opening. At least three terminals are disposed on the first and second surfaces. Two rows of terminals may be provided for on the first and second surfaces of the carrier to provide separate electrical connections to integrated circuit packages that are electrically upstream from lower packages. In some cases, integrated circuit packages that are part of the same integrated circuit unit but have distinct functionality, but are upstream from lower integrated circuit packages, may be electrically isolated from internal terminals that connect lower integrated circuit packages. At least one of the terminals disposed on the first surface and at least one of the terminals disposed on the second surface are electrically connected with at least one of the routing strips. The first and second integrated circuit packages also include at least one via electrically connecting the terminals disposed on the first surface with the terminals disposed on said second surface.
A chip is adhered to each of the carriers on either the first or second surfaces depending on the positioning of routing strips on or in the carrier. Each chip has bonding pads disposed thereon. Solder balls or bumps form solder bonding that electrically connects the bonding pads to the routing strips. An adhesive layer or underfill fills the space between the silicon chip and the carrier that does not contain solder bonding. By using solder balls to interconnect the silicon chip with the carrier the overall profile or height of the integrated circuit package, unit and/or module of the present invention is significantly reduced. Reductions from 20 to 40 percent of the overall profile are achieved depending on the number and thickness of the integrated circuit packages that are used to form the integrated circuit unit and/or module of the present invention.
The integrated circuit packages further include bus bars being integral with the carriers and extending to the solder bonding. The bus bar electrically connects at least one of the bonding pads of the chip to at least one the terminals disposed on the first and the second surfaces of the carrier.
The integrated circuit unit is formed by electrically connecting at least one of the terminals disposed on the second surface of the first integrated circuit package with at least one of the terminals disposed on the first surface of the second integrated circuit package. In one embodiment, solder balls are used to make the electrical connection between the first and second integrated circuit packages. In another embodiment, solder columns are used to make the electrical connection between the first and second integrated circuit packages.
The integrated circuit unit may further include additional integrated circuit packages stackably and electrically connected together, for example, a third integrated circuit package may be stackably and electrically connected to the second integrated circuit package and a fourth integrated circuit package may be stackably and electrically connected to the third integrated circuit package.
Once the integrated circuit units are constructed, they may be attached to a printed circuit mother or sister circuit board to form, for example, a module. In this way, the number of integrated circuit packages stacked at a given location on the module may be increased, thus enabling a higher density module. Furthermore, the integrated circuit module can be handled and packaged as a single item during processing, rather that handling

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of fabricating thin integrated circuit units does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating thin integrated circuit units, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating thin integrated circuit units will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2985791

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.