Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant
Reexamination Certificate
2005-04-06
2008-10-21
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Diffusing a dopant
C438S289000, C438S479000, C438S481000, C438S752000, C438S753000, C438S770000, C257SE21090, C257SE21097, C257SE21099, C257SE21135, C257SE21152
Reexamination Certificate
active
07439165
ABSTRACT:
A process for forming both tensile and compressive strained silicon layers to accommodate channel regions of MOSFET or CMOS devices has been developed. After formation of shallow trench isolation structures as well as application of high temperature oxidation and activation procedures, the fabrication sequences used to obtain the strained silicon layers is initiated. A semiconductor alloy layer is deposited followed by an oxidation procedure used to segregate a germanium component from the overlying semiconductor alloy layer into an underlying single crystalline silicon body. The level of germanium segregated into the underlying single crystalline silicon body determines the level of strain, which is in tensile state of a subsequently selectively grown silicon layer. A second embodiment of this invention features the thinning of a portion of the semiconductor alloy layer prior to the oxidation procedure allowing a lower level of germanium to be segregated into a first underlying portion of the underlying single crystalline silicon body, while during the same oxidation procedure a second portion of the underlying single crystalline silicon body receives a higher level of germanium segregation. So the subsequently deposited silicon-germanium layer, although the same process and thickness, can be strained in different states (tensile or compressive) and levels, depending different underlying portions' germanium concentration.
REFERENCES:
patent: 5266813 (1993-11-01), Comfort et al.
patent: 5308785 (1994-05-01), Comfort et al.
patent: 6429061 (2002-08-01), Rim
patent: 6673696 (2004-01-01), Arasnia et al.
patent: 6696348 (2004-02-01), Xiang
patent: 6821828 (2004-11-01), Ichijo et al.
patent: 7163903 (2007-01-01), Orlowski et al.
patent: 7183168 (2007-02-01), Matsuda et al.
patent: 2004/0108559 (2004-06-01), Sugii et al.
patent: 2004/0137742 (2004-07-01), Ngo et al.
patent: 2004/0142537 (2004-07-01), Lee et al.
patent: 2004/0150042 (2004-08-01), Yeo et al.
patent: 2004/0164373 (2004-08-01), Koester et al.
patent: 2004/0180509 (2004-09-01), Wang et al.
patent: 2004/0209437 (2004-10-01), Chiu et al.
patent: 2004/0219767 (2004-11-01), Arena et al.
patent: 2005/0133834 (2005-06-01), Sorada et al.
patent: 2005/0227498 (2005-10-01), Furukawa et al.
patent: 2005/0285192 (2005-12-01), Zhu
patent: 2007/0178646 (2007-08-01), Ramaswamy et al.
Balasubramanian Narayanan
Bera Lakshmi Kanta
Lo Patrick Guo Oiang
Loh Wei Yip
Subramanian Balakumar
Ackerman Stephen B.
Agency for Sceince, Technology and Reasearch
Jr. Carl Whitehead
Nicely Joseph C
Saile Ackerman LLC
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