Method of fabricating semiconductor memory device and...

Details Method of fabricating semiconductor memory device and... Method of fabricating semiconductor memory device and...

2002-10-25

2004-09-21

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S257000, C438S275000, C438S279000

Reexamination Certificate

active

06794248

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority of Japanese Patent Application No. 2002-049438, filed on Feb. 26, 2002, the contents being incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor memory device and a semiconductor memory device, and more particularly to a method of fabricating a non-volatile semiconductor memory device having the step of erasing charges cumulated in a charge storage part such as a floating gate by irradiating ultraviolet rays onto the surface of a metal wiring line of a bonding pad and such a semiconductor memory device.
2. Description of the Related Art
Semiconductor memories using MOSFETs (Metal Oxide Semiconductor Type Field Effect Transistor) are generally used for storing digital data. Among these semiconductor memories, an EEPROM (Electrically Erasable Programmable Read Only Memory) and a flash memory, which are electrically programmable ROMs, are used to store the program code of the cellular phone and a system BIOS (Basic Input Output System) of the mother board of the personal computer (PC).
The programmable ROMs as described above have the structure of storing information by accumulating charges in a charge storage part such as a floating gate.
It is known that hot electrons occur due to plasma used in the etching or ashing step of the process for fabricating the semiconductor memory devices with the floating gates and charges resulting from the hot electros are injected in the floating gate. This may cause a memory malfunction. Further, if too many charges are stored, an insulating film that is in contact with the floating gate may be destroyed. In order to avoid these problems, the fabrication process is additionally provided with the step of erasing the charges stored in the floating gate by ultraviolet rays.
In the fabrication process for the general semiconductor memory devices including the programmable ROMs, it is known that a multilayer metallization is formed by the combination of deposition of a thin insulation or metal film, resist deposition, pattern transfer by photolithography, selective thin film removal by etching, and resist removal. Memory elements are formed by the combination of the multilayer metallization fabrication technique and MOS transistor fabrication technique. Further, the memory elements are packaged in order to prevent age deterioration of the memory elements function and implement the input/output function. In order to interconnect the input/output terminals of the package and the memory input/output signals on the semiconductor substrate, bonding pads electrically coupled with the memory elements formed on the substrate are formed.
However, the conventional fabrication method has the following problems. As has described, the final step on the substrate is to form the bonding pads. Thereafter, the charges stored in the floating gates are erased by irradiation of ultraviolet rays. In the step of forming the bonding pad parts, dry ashing such as plasma ashing using oxygen-based gas is employed to remove the resist. Then, wet ashing is performed using solution that contains hydroxylamine in order to completely remove the resist. During the above process, the metal oxide film formed on the metallization is removed, so that the metallization is exposed.
In this case, chlorine (Cl) and another ion are deposited on the metallization exposed during the etching process for the bonding pad parts, and react with moisture in the atmosphere. This causes corrosion of the aluminum metallization after etching. For example, corrosion occurs by the following reaction: Al+4CL
−
→AlCl
4
−
+3e
−
,AlCl
4
−
+3H
2
O→Al(OH)
3
+3H
+
+4Cl
−
.
Even in the clean room, the density of Cl may exceed a reference situation in which the wafer may be contaminated so that ions of 300×E10 [molecule/cm
2
] have been deposited thereon after it remains for 24 hours in the uncontrolled state. Further, the solution for use in wet ashing may contain slight Cl. These factors may cause corrosion.
Furthermore, corroding may be enhanced by such a mechanism that Cl
−
ions and a reaction product deposited on the wafer by the resist removal apparatus and from another environment until the process of removing the charges stored in the floating gates by ultraviolet rays after the etching process for the bonding pad parts react with oxygen in the atmosphere with high optical energy of ultraviolet rays being used as activation energy when irradiating.
SUMMARY OF THE INVENTION
Taking into consideration the above, an object of the present invention is to provide a method of fabricating a semiconductor memory device capable of preventing metallization from being corroded and such a device.
To accomplish the above object, there is provided a method of fabricating a semiconductor memory device having a step of irradiating ultraviolet rays onto a metal interconnection at a bonding pad part and thus erasing charges stored in a charge storage part, the method further comprising the steps of: forming a protection film on a surface of the metal interconnection; and irradiating the ultraviolet rays onto the protection film and thus erasing the charges.
The above object of the present invention is also accomplished by a semiconductor memory device fabricated by irradiating ultraviolet rays onto a metal interconnection at a bonding pad part and thus erasing charges stored in a charge storage part, the semiconductor memory device comprising a protection film on a surface of the metal interconnection.
The above and other objects, features and advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying drawings which illustrate preferred embodiments of the present invention by way of example.


REFERENCES:
patent: 4581622 (1986-04-01), Takasaki et al.
patent: 5742094 (1998-04-01), Ting
patent: 5767544 (1998-06-01), Kuroda et al.
patent: 5883001 (1999-03-01), Jin et al.
patent: 6350651 (2002-02-01), Wada et al.
patent: 6475895 (2002-11-01), Mei et al.
patent: 6727143 (2004-04-01), Hui et al.

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