Method of fabricating semiconductor memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S264000, C438S266000, C257SE29129

Reexamination Certificate

active

07098104

ABSTRACT:
A silicon layer doped with an impurity for a floating gate, a protective layer, a silicon nitride layer of a laminated hard mask and a first NSG layer are formed into a desired pattern, on which a second NSG layer is formed and left as a side wall. With the second NSG layer as a mask, the silicon nitride layer is etched. Using the remaining silicon nitride layer as a mask, the silicon layer is etched to form a silicon pattern whose surface is covered with a second protective layer, and the silicon nitride layer is etched out. Accordingly, it is possible to prevent a damage at the surface of the floating gate at the time of forming the floating gate using doped polysilicon.

REFERENCES:
patent: 10-294367 (1998-11-01), None
patent: 11-121638 (1999-04-01), None
patent: 2000-40754 (2000-02-01), None

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