Method of fabricating semiconductor device having notched gate

Details Method of fabricating semiconductor device having notched gate Method of fabricating semiconductor device having notched gate

2005-02-22

2005-02-22

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S410000, C257S411000, C438S169000, C438S043000, C438S494000

Reexamination Certificate

active

06858907

ABSTRACT:
A semiconductor device includes: a silicon substrate; a source/drain region formed in the substrate including a lightly doped region and an adjacent heavily doped region, the depth of the heavily doped region being greater than the depth of the lightly doped region; a gate oxide layer on the silicon substrate; and a notched gate electrode on the substrate, the notched gate electrode including a notch along an outer side surface of a lower portion such that a top portion of the notched gate electrode is wider than the lower portion, the gate oxide layer extending between the interface of the notched gate electrode and the substrate, and a gate poly oxide layer provided along an outer side surface of the notched gate electrode and along an inner wall of the notch, a portion of the lightly doped region being under the notch.

REFERENCES:
patent: 5851890 (1998-12-01), Tsai et al.
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patent: 6204133 (2001-03-01), Yu et al.
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patent: 6528363 (2003-03-01), Ku et al.
patent: 6541320 (2003-04-01), Brown et al.
patent: 20020132431 (2002-09-01), Fung et al.

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