Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-02-28
1998-05-19
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438290, H01L 218246
Patent
active
057535531
ABSTRACT:
In order to improve the degree of storage data integration, side walls (32) are selectively formed on side surfaces of word lines (22) to serve as masks for changing ON-state current values of memory cells by changing widths or lengths of active regions (24) of the memory cells, thereby forming a plurality of types of memory cells having different electrical properties. Thus, storage data per memory cell is so multivalued that the number of memory cells is reduced.
REFERENCES:
patent: 5328863 (1994-07-01), Cappelletti et al.
patent: 5407852 (1995-04-01), Ghio et al.
patent: 5429975 (1995-07-01), Sheu et al.
patent: 5449632 (1995-09-01), Hong
Hikawa Tetsuo
Sawada Takashi
Takata Akira
Chaudhari Chandra
Mega Chips Corporation
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