Method of fabricating read only memory and memory cell array

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S225000, C438S258000, C438S294000, C438S301000, C438S303000, C438S439000

Reexamination Certificate

active

07060551

ABSTRACT:
A method of fabricating a read only memory cell array is described. A patterned film is formed over the substrate to define the predetermined positions of bit lines on the substrate and exposing a plurality of predetermined portions of the substrate. A plurality of field oxide layers is formed on the exposed portions of the substrate to define the positions of channels. After removing the patterned film, ions are implanted into the substrate to form the bit lines by using the field oxide layer as implanting mask. The field oxide layer is removed to form several recesses on the substrate. Thereafter, a gate insulating layer and word lines are formed over the substrate, and the recess channels are formed underneath the gate-insulating layer. The length of the recess channel is large enough to reduce the short channel effect.

REFERENCES:
patent: 6391722 (2002-05-01), Koh
patent: 6531733 (2003-03-01), Jang
patent: 6569736 (2003-05-01), Hsu et al.
patent: 6713336 (2004-03-01), Shin et al.
patent: 6780695 (2004-08-01), Chen et al.
patent: 2002/0001891 (2002-01-01), Kim et al.

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