Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-06-05
2008-09-02
Dang, Phuc T (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S571000, C438S572000, C257S155000, C257S192000
Reexamination Certificate
active
07419862
ABSTRACT:
Provided is a method of fabricating a pseudomorphic high electron mobility transistor (PHEMT). The method includes the steps of: preparing a substrate including a channel layer and a capping layer that is the uppermost layer; forming a source and a drain on the capping layer; forming a first protective layer on the entire surface of the resultant structure and then patterning the first protective layer to expose a portion of the capping layer in a channel region; removing the exposed portion of the capping layer to form a first recess structure; forming a second protective layer on the entire surface of the resultant structure and then patterning the second protective layer to expose a portion of the substrate in the first recess structure so that a second recess structure is formed; forming a multilayered photoresist layer on the entire surface of the resultant structure and then patterning the multilayered photoresist layer to expose a portion of the substrate through the second recess structure and form a gate-shaped opening; and depositing a metal layer to fill the gate-shaped opening and then removing the multilayered photoresist layer to form a gate connected to the substrate through the second recess structure.
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‘A Comparative Study on the DC, Microwave Characteristics of 0.12 μm Double-Recessed Gate AlGaAs/InGaAs/GaAs PHEMTs Using a Dielectric Assisted Process’ Lim et al., Extended Abstracts of the 2005 International Conference on Solid State Devices and Materials, Kobe, 2005, pp. 690-691, pp. 690-691.
Japanese Office Action issued by the Japanese Patent Office, dated Jul. 2, 2008 to the Japanese counterpart patent application No. 2006-170476.
Ahn Ho Kyun
Chang Woo Jin
Ji Hong Gu
Kim Hea Cheon
Lim Jong Won
Dang Phuc T
Ladas & Parry LLP
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