Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-23
2007-10-23
Hoang, Quoc (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S593000, C257S316000, C257SE21180, C257SE21210, C257SE21423, C257SE21679
Reexamination Certificate
active
11558453
ABSTRACT:
A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.
REFERENCES:
patent: 7238974 (2007-07-01), Strassburg et al.
Chu Chien-Lung
Pittikoun Saysamone
Tseng Wei-Chung
Wei Houng-Chi
Hoang Quoc
Jianq Chyun IP Office
Powerchip Semiconductor Corp.
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