Method of fabricating non-volatile memory

Details Method of fabricating non-volatile memory Method of fabricating non-volatile memory

2007-01-09

2007-01-09

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C257SE21209, C438S926000

Reexamination Certificate

active

11162042

ABSTRACT:
A method for manufacturing a non-volatile memory. The method comprises steps of forming a first dielectric layer on a substrate and forming a dummy gate layer on the first dielectric layer. Further, the dummy gate layer is defined to form a plurality of dummy gates and a doped region is formed in the substrate by using the dummy gates as a mask. A second dielectric layer is formed on a portion of the first dielectric layer corresponding to the location of the doped region and the dummy gates are removed to expose a portion of the first dielectric layer. A conductive layer is formed over the substrate to cover the second dielectric layer and the first dielectric layer.

REFERENCES:
patent: 5556799 (1996-09-01), Hong
patent: 6368923 (2002-04-01), Huang
patent: 6475863 (2002-11-01), Kim
patent: 6853028 (2005-02-01), Kim et al.

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