Method of fabricating multi-bit flash memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S211000, C257S315000, C257SE29309

Reexamination Certificate

active

07098096

ABSTRACT:
A method of fabricating a multi-bit flash memory, having a control gate, a floating gate, a source region, a drain region and a channel region. An isolation region is formed in the floating gate to partition the floating gate into a plurality of conductive blocks. The conductive blocks are arranged in an array with rows extending from the source region to the drain region. Each row of the array has two conductive blocks. Before any data is written to the flash memory, the channel regions under the conductive blocks of the same row have the same threshold voltage, while the channel regions under the conductive blocks of different rows have different threshold voltage.

REFERENCES:
patent: 6420237 (2002-07-01), Chang
patent: 6432782 (2002-08-01), Lung et al.
patent: 6620683 (2003-09-01), Lin et al.
patent: 6674133 (2004-01-01), Chang
patent: 6747896 (2004-06-01), Wong
patent: 6826084 (2004-11-01), Wong
patent: 2002/0149066 (2002-10-01), Chang et al.
patent: 2003/0193064 (2003-10-01), Wu

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